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radeonsi/vcn: Disable H264/5 constrained intra pred with rate control

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There is a FW issue when using constrained intra prediction with rate
control enabled, causing unexpected quality degradation.
Disable it until FW fix is available.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36837>
(cherry picked from commit 51d5c0d537)
This commit is contained in:
David Rosca 2025-08-18 17:10:10 +02:00 • committed by Eric Engestrom
parent 9e77cb7493
commit 26fe847539
2 changed files with 5 additions and 1 deletions
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2
.pick_status.json
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@ -4994,7 +4994,7 @@
"description": "radeonsi/vcn: Disable H264/5 constrained intra pred with rate control",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

4
src/gallium/drivers/radeonsi/radeon_vcn_enc.c
View file

@ -293,7 +293,9 @@ static void radeon_vcn_enc_h264_get_spec_misc_param(struct radeon_encoder *enc,
enc->enc_pic.spec_misc.redundant_pic_cnt_present_flag =
pic->pic_ctrl.redundant_pic_cnt_present_flag;
enc->enc_pic.spec_misc.b_picture_enabled = !!pic->seq.max_num_reorder_frames;
/* FW issue when using constrained intra pred with rate control. */
enc->enc_pic.spec_misc.constrained_intra_pred_flag =
!enc->enc_pic.rc_session_init.rate_control_method &&
pic->pic_ctrl.constrained_intra_pred_flag;
enc->enc_pic.spec_misc.half_pel_enabled = 1;
enc->enc_pic.spec_misc.quarter_pel_enabled = 1;
@ -635,7 +637,9 @@ static void radeon_vcn_enc_hevc_get_spec_misc_param(struct radeon_encoder *enc,
enc->enc_pic.hevc_spec_misc.amp_disabled = !pic->seq.amp_enabled_flag;
enc->enc_pic.hevc_spec_misc.strong_intra_smoothing_enabled =
pic->seq.strong_intra_smoothing_enabled_flag;
/* FW issue when using constrained intra pred with rate control. */
enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag =
!enc->enc_pic.rc_session_init.rate_control_method &&
pic->pic.constrained_intra_pred_flag;
enc->enc_pic.hevc_spec_misc.cabac_init_flag = pic->slice.cabac_init_flag;
enc->enc_pic.hevc_spec_misc.half_pel_enabled = 1;