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iris: Add CCS cache flush bits

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Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
This commit is contained in:
Sagar Ghuge 2023-06-20 21:35:07 -07:00
parent e88eac5b6c
commit 26a7e997fb
2 changed files with 4 additions and 1 deletions
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1
src/gallium/drivers/iris/iris_context.h
View file

@ -358,6 +358,7 @@ enum pipe_control_flags
PIPE_CONTROL_PSS_STALL_SYNC = (1 << 27),
PIPE_CONTROL_L3_READ_ONLY_CACHE_INVALIDATE = (1 << 28),
PIPE_CONTROL_UNTYPED_DATAPORT_CACHE_FLUSH = (1 << 29),
PIPE_CONTROL_CCS_CACHE_FLUSH = (1 << 30),
};
#define PIPE_CONTROL_CACHE_FLUSH_BITS \

4
src/gallium/drivers/iris/iris_state.c
View file

@ -8688,7 +8688,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
if (INTEL_DEBUG(DEBUG_PIPE_CONTROL)) {
fprintf(stderr,
" PC [%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%"PRIx64"]: %s\n",
" PC [%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%"PRIx64"]: %s\n",
(flags & PIPE_CONTROL_FLUSH_ENABLE) ? "PipeCon " : "",
(flags & PIPE_CONTROL_CS_STALL) ? "CS " : "",
(flags & PIPE_CONTROL_STALL_AT_SCOREBOARD) ? "Scoreboard " : "",
@ -8699,6 +8699,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
(flags & PIPE_CONTROL_DATA_CACHE_FLUSH) ? "DC " : "",
(flags & PIPE_CONTROL_DEPTH_CACHE_FLUSH) ? "ZFlush " : "",
(flags & PIPE_CONTROL_TILE_CACHE_FLUSH) ? "Tile " : "",
(flags & PIPE_CONTROL_CCS_CACHE_FLUSH) ? "CCS " : "",
(flags & PIPE_CONTROL_DEPTH_STALL) ? "ZStall " : "",
(flags & PIPE_CONTROL_STATE_CACHE_INVALIDATE) ? "State " : "",
(flags & PIPE_CONTROL_TLB_INVALIDATE) ? "TLB " : "",
@ -8742,6 +8743,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
(flags & PIPE_CONTROL_UNTYPED_DATAPORT_CACHE_FLUSH) &&
IS_COMPUTE_PIPELINE(batch);
pc.HDCPipelineFlushEnable |= pc.UntypedDataPortCacheFlushEnable;
pc.CCSFlushEnable |= flags & PIPE_CONTROL_CCS_CACHE_FLUSH;
#endif
pc.LRIPostSyncOperation = NoLRIOperation;
pc.PipeControlFlushEnable = flags & PIPE_CONTROL_FLUSH_ENABLE;