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radeonsi/nir: simplify si_lower_nir signature
just a cleanup
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parent
923aa3918c
commit
268e0e01f3
4 changed files with 17 additions and 17 deletions
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@ -128,7 +128,7 @@ static void si_create_compute_state_async(void *job, int thread_index)
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si_nir_opts(sel->nir);
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si_nir_scan_shader(sel->nir, &sel->info);
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si_lower_nir(sel);
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si_lower_nir(sel->screen, sel->nir);
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}
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/* Store the declared LDS size into tgsi_shader_info for the shader
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@ -757,7 +757,7 @@ void si_nir_scan_shader(const struct nir_shader *nir,
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void si_nir_scan_tess_ctrl(const struct nir_shader *nir,
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struct tgsi_tessctrl_info *out);
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void si_nir_lower_ps_inputs(struct nir_shader *nir);
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void si_lower_nir(struct si_shader_selector *sel);
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void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir);
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void si_nir_opts(struct nir_shader *nir);
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/* si_state_shaders.c */
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@ -942,21 +942,21 @@ void si_nir_lower_ps_inputs(struct nir_shader *nir)
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* Perform "lowering" operations on the NIR that are run once when the shader
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* selector is created.
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*/
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void si_lower_nir(struct si_shader_selector *sel)
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void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir)
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{
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/* Adjust the driver location of inputs and outputs. The state tracker
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* interprets them as slots, while the ac/nir backend interprets them
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* as individual components.
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*/
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if (sel->nir->info.stage != MESA_SHADER_FRAGMENT) {
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nir_foreach_variable(variable, &sel->nir->inputs)
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if (nir->info.stage != MESA_SHADER_FRAGMENT) {
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nir_foreach_variable(variable, &nir->inputs)
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variable->data.driver_location *= 4;
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}
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nir_foreach_variable(variable, &sel->nir->outputs) {
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nir_foreach_variable(variable, &nir->outputs) {
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variable->data.driver_location *= 4;
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if (sel->nir->info.stage == MESA_SHADER_FRAGMENT) {
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if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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if (variable->data.location == FRAG_RESULT_DEPTH)
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variable->data.driver_location += 2;
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else if (variable->data.location == FRAG_RESULT_STENCIL)
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@ -975,7 +975,7 @@ void si_lower_nir(struct si_shader_selector *sel)
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static const struct nir_lower_tex_options lower_tex_options = {
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.lower_txp = ~0u,
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};
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NIR_PASS_V(sel->nir, nir_lower_tex, &lower_tex_options);
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NIR_PASS_V(nir, nir_lower_tex, &lower_tex_options);
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const nir_lower_subgroups_options subgroups_options = {
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.subgroup_size = 64,
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@ -985,25 +985,25 @@ void si_lower_nir(struct si_shader_selector *sel)
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.lower_vote_trivial = false,
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.lower_vote_eq_to_ballot = true,
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};
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NIR_PASS_V(sel->nir, nir_lower_subgroups, &subgroups_options);
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NIR_PASS_V(nir, nir_lower_subgroups, &subgroups_options);
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/* Lower load constants to scalar and then clean up the mess */
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NIR_PASS_V(sel->nir, nir_lower_load_const_to_scalar);
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NIR_PASS_V(sel->nir, nir_lower_var_copies);
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si_nir_opts(sel->nir);
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NIR_PASS_V(nir, nir_lower_load_const_to_scalar);
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NIR_PASS_V(nir, nir_lower_var_copies);
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si_nir_opts(nir);
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/* Lower large variables that are always constant with load_constant
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* intrinsics, which get turned into PC-relative loads from a data
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* section next to the shader.
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*/
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NIR_PASS_V(sel->nir, nir_opt_large_constants,
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NIR_PASS_V(nir, nir_opt_large_constants,
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glsl_get_natural_size_align_bytes, 16);
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ac_lower_indirect_derefs(sel->nir, sel->screen->info.chip_class);
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ac_lower_indirect_derefs(nir, sscreen->info.chip_class);
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si_nir_opts(sel->nir);
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si_nir_opts(nir);
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NIR_PASS_V(sel->nir, nir_lower_bool_to_int32);
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NIR_PASS_V(nir, nir_lower_bool_to_int32);
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}
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static void declare_nir_input_vs(struct si_shader_context *ctx,
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@ -2473,7 +2473,7 @@ static void si_init_shader_selector_async(void *job, int thread_index)
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compiler = &sscreen->compiler[thread_index];
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if (sel->nir)
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si_lower_nir(sel);
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si_lower_nir(sel->screen, sel->nir);
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/* Compile the main shader part for use with a prolog and/or epilog.
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* If this fails, the driver will try to compile a monolithic shader
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