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r300: emit one full vec4 immediate per NIR load_const

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Stop relying on ureg_DECL_immediate's "expand" path to fill earlier
TGSI immediates' unused components with values from later load_const
instructions and depend on later backed pass to do it.

Mostly a wash on shader-db: sub-0.1% regressions on inst/cycles/
consts on RV530/RV370/RV410, with one LOST shader on RV370
(trine/fp-17.shader_test FS).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41577>
This commit is contained in:
Pavel Ondračka 2026-05-07 09:32:51 +02:00 • committed by Marge Bot
parent d8d7e2057f
commit 267b6e4bef
1 changed files with 5 additions and 2 deletions
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7
src/gallium/drivers/r300/compiler/nir_to_rc.c
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@ -622,12 +622,15 @@ ntr_get_load_const_src(struct ntr_compile *c, nir_load_const_instr *instr)
{
int num_components = instr->def.num_components;
float values[4];
/* Always emit a full vec4 immediate per load_const and let the
* RC backend's constant packing handle it later.
*/
float values[4] = {0};
assert(instr->def.bit_size == 32);
for (int i = 0; i < num_components; i++)
values[i] = uif(instr->value[i].u32);
return ureg_DECL_immediate(c->ureg, values, num_components);
return ureg_DECL_immediate(c->ureg, values, 4);
}
static struct ureg_src