From 264ef3a6fa051d593e4bbc2c30c154e08004bfd5 Mon Sep 17 00:00:00 2001 From: Lorenzo Rossi Date: Fri, 20 Feb 2026 21:47:13 +0100 Subject: [PATCH] pan/compiler: Add formats to varyings info Signed-off-by: Lorenzo Rossi Reviewed-by: Faith Ekstrand Acked-by: Eric R. Smith Part-of: --- src/panfrost/compiler/bifrost/bifrost_compile.c | 9 +++++++++ src/panfrost/compiler/midgard/midgard_compile.c | 9 +++++++++ src/panfrost/compiler/pan_compiler.h | 2 ++ 3 files changed, 20 insertions(+) diff --git a/src/panfrost/compiler/bifrost/bifrost_compile.c b/src/panfrost/compiler/bifrost/bifrost_compile.c index d4b3d19ae83..c440e41ed4a 100644 --- a/src/panfrost/compiler/bifrost/bifrost_compile.c +++ b/src/panfrost/compiler/bifrost/bifrost_compile.c @@ -7067,6 +7067,15 @@ bifrost_compile_shader_nir(nir_shader *nir, info->stage = nir->info.stage; pan_nir_collect_varyings(nir, info); + if (nir->info.stage == MESA_SHADER_VERTEX) { + assert(inputs->varying_layout); + memcpy(&info->varyings.formats, inputs->varying_layout, + sizeof(*inputs->varying_layout)); + } else if (nir->info.stage == MESA_SHADER_FRAGMENT) { + pan_varying_collect_formats(&info->varyings.formats, + nir, inputs->gpu_id, + inputs->trust_varying_flat_highp_types, false); + } if (nir->info.stage == MESA_SHADER_VERTEX && info->vs.idvs) { /* On 5th Gen, IDVS is only in one binary */ diff --git a/src/panfrost/compiler/midgard/midgard_compile.c b/src/panfrost/compiler/midgard/midgard_compile.c index 06339fb165f..070cca03b47 100644 --- a/src/panfrost/compiler/midgard/midgard_compile.c +++ b/src/panfrost/compiler/midgard/midgard_compile.c @@ -2983,6 +2983,15 @@ midgard_compile_shader_nir(nir_shader *nir, /* Collect varyings after lowering I/O */ info->quirk_no_auto32 = (ctx->quirks & MIDGARD_NO_AUTO32); pan_nir_collect_varyings(nir, info); + if (nir->info.stage == MESA_SHADER_VERTEX) { + assert(inputs->varying_layout); + memcpy(&info->varyings.formats, inputs->varying_layout, + sizeof(*inputs->varying_layout)); + } else if (nir->info.stage == MESA_SHADER_FRAGMENT) { + pan_varying_collect_formats(&info->varyings.formats, + nir, inputs->gpu_id, + inputs->trust_varying_flat_highp_types, false); + } /* Optimisation passes */ optimise_nir(nir, ctx->quirks, inputs->is_blend); diff --git a/src/panfrost/compiler/pan_compiler.h b/src/panfrost/compiler/pan_compiler.h index 374e7c39bf9..cd73b75776e 100644 --- a/src/panfrost/compiler/pan_compiler.h +++ b/src/panfrost/compiler/pan_compiler.h @@ -496,6 +496,8 @@ struct pan_shader_info { /* Bitfield of special varyings. */ uint32_t fixed_varyings; + + struct pan_varying_layout formats; } varyings; /* UBOs to push to Register Mapped Uniforms (Midgard) or Fast Access