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radeonsi: re-enable fp16_rtz for compute blits to fix PBO tests on gfx11
Fixes: bcdde99675 - radeonsi: don't convert to fp16 in the compute blit if not testing
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23216>
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cc199c2baa
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1 changed files with 6 additions and 5 deletions
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@ -1140,14 +1140,15 @@ bool si_compute_blit(struct si_context *sctx, const struct pipe_blit_info *info,
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options.last_src_channel < options.last_dst_channel &&
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options.last_dst_channel == 3;
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/* WARNING: We only use this codepath for AMD_TEST to get results identical with the gfx blit,
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/* WARNING: We need this option for AMD_TEST to get results identical with the gfx blit,
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* otherwise we wouldn't be able to fully validate whether everything else works.
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* The test expects that the behavior is identical to u_blitter.
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*
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* Additionally, we need to keep this enabled even when not testing because not doing fp16_rtz
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* breaks "piglit/bin/texsubimage -auto pbo".
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*/
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if (testing) {
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options.fp16_rtz = !util_format_is_pure_integer(info->dst.format) &&
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dst_desc->channel[i].size <= 10;
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}
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options.fp16_rtz = !util_format_is_pure_integer(info->dst.format) &&
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dst_desc->channel[i].size <= 10;
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struct hash_entry *entry = _mesa_hash_table_search(sctx->cs_blit_shaders,
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(void*)(uintptr_t)options.key);
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