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anv: Make anv_image derive from vk_image

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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12023>
This commit is contained in:
Jason Ekstrand 2021-07-21 20:42:00 -05:00 • committed by Marge Bot
parent 0e6c320a7d
commit 25d4cffabf
6 changed files with 244 additions and 343 deletions
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10
src/intel/vulkan/anv_android.c
View file

@ -405,11 +405,11 @@ anv_create_ahw_memory(VkDevice device_h,
/* If caller passed dedicated information. */
if (dedicated_info && dedicated_info->image) {
ANV_FROM_HANDLE(anv_image, image, dedicated_info->image);
w = image->extent.width;
h = image->extent.height;
layers = image->array_size;
format = android_format_from_vk(image->vk_format);
usage = anv_ahw_usage_from_vk_usage(image->create_flags, image->usage);
w = image->vk.extent.width;
h = image->vk.extent.height;
layers = image->vk.array_layers;
format = android_format_from_vk(image->vk.format);
usage = anv_ahw_usage_from_vk_usage(image->vk.create_flags, image->vk.usage);
} else if (dedicated_info && dedicated_info->buffer) {
ANV_FROM_HANDLE(anv_buffer, buffer, dedicated_info->buffer);
w = buffer->size;

95
src/intel/vulkan/anv_blorp.c
View file

@ -304,15 +304,15 @@ copy_image(struct anv_cmd_buffer *cmd_buffer,
const VkImageCopy2KHR *region)
{
VkOffset3D srcOffset =
anv_sanitize_image_offset(src_image->type, region->srcOffset);
anv_sanitize_image_offset(src_image->vk.image_type, region->srcOffset);
VkOffset3D dstOffset =
anv_sanitize_image_offset(dst_image->type, region->dstOffset);
anv_sanitize_image_offset(dst_image->vk.image_type, region->dstOffset);
VkExtent3D extent =
anv_sanitize_image_extent(src_image->type, region->extent);
anv_sanitize_image_extent(src_image->vk.image_type, region->extent);
const uint32_t dst_level = region->dstSubresource.mipLevel;
unsigned dst_base_layer, layer_count;
if (dst_image->type == VK_IMAGE_TYPE_3D) {
if (dst_image->vk.image_type == VK_IMAGE_TYPE_3D) {
dst_base_layer = region->dstOffset.z;
layer_count = region->extent.depth;
} else {
@ -323,7 +323,7 @@ copy_image(struct anv_cmd_buffer *cmd_buffer,
const uint32_t src_level = region->srcSubresource.mipLevel;
unsigned src_base_layer;
if (src_image->type == VK_IMAGE_TYPE_3D) {
if (src_image->vk.image_type == VK_IMAGE_TYPE_3D) {
src_base_layer = region->srcOffset.z;
} else {
src_base_layer = region->srcSubresource.baseArrayLayer;
@ -487,19 +487,18 @@ copy_buffer_to_image(struct anv_cmd_buffer *cmd_buffer,
image_layout, ISL_AUX_USAGE_NONE,
&image.surf);
image.offset =
anv_sanitize_image_offset(anv_image->type, region->imageOffset);
anv_sanitize_image_offset(anv_image->vk.image_type, region->imageOffset);
image.level = region->imageSubresource.mipLevel;
VkExtent3D extent =
anv_sanitize_image_extent(anv_image->type, region->imageExtent);
if (anv_image->type != VK_IMAGE_TYPE_3D) {
anv_sanitize_image_extent(anv_image->vk.image_type, region->imageExtent);
if (anv_image->vk.image_type != VK_IMAGE_TYPE_3D) {
image.offset.z = region->imageSubresource.baseArrayLayer;
extent.depth =
anv_get_layerCount(anv_image, &region->imageSubresource);
extent.depth = anv_get_layerCount(anv_image, &region->imageSubresource);
}
const enum isl_format linear_format =
anv_get_isl_format(&cmd_buffer->device->info, anv_image->vk_format,
anv_get_isl_format(&cmd_buffer->device->info, anv_image->vk.format,
aspect, VK_IMAGE_TILING_LINEAR);
const struct isl_format_layout *linear_fmtl =
isl_format_get_layout(linear_format);
@ -689,14 +688,14 @@ blit_image(struct anv_cmd_buffer *cmd_buffer,
dst_image_layout, ISL_AUX_USAGE_NONE, &dst);
struct anv_format_plane src_format =
anv_get_format_aspect(&cmd_buffer->device->info, src_image->vk_format,
1U << aspect_bit, src_image->tiling);
anv_get_format_aspect(&cmd_buffer->device->info, src_image->vk.format,
1U << aspect_bit, src_image->vk.tiling);
struct anv_format_plane dst_format =
anv_get_format_aspect(&cmd_buffer->device->info, dst_image->vk_format,
1U << aspect_bit, dst_image->tiling);
anv_get_format_aspect(&cmd_buffer->device->info, dst_image->vk.format,
1U << aspect_bit, dst_image->vk.tiling);
unsigned dst_start, dst_end;
if (dst_image->type == VK_IMAGE_TYPE_3D) {
if (dst_image->vk.image_type == VK_IMAGE_TYPE_3D) {
assert(dst_res->baseArrayLayer == 0);
dst_start = region->dstOffsets[0].z;
dst_end = region->dstOffsets[1].z;
@ -706,7 +705,7 @@ blit_image(struct anv_cmd_buffer *cmd_buffer,
}
unsigned src_start, src_end;
if (src_image->type == VK_IMAGE_TYPE_3D) {
if (src_image->vk.image_type == VK_IMAGE_TYPE_3D) {
assert(src_res->baseArrayLayer == 0);
src_start = region->srcOffsets[0].z;
src_end = region->srcOffsets[1].z;
@ -722,7 +721,7 @@ blit_image(struct anv_cmd_buffer *cmd_buffer,
/* There is no interpolation to the pixel center during rendering, so
* add the 0.5 offset ourselves here. */
float depth_center_offset = 0;
if (src_image->type == VK_IMAGE_TYPE_3D)
if (src_image->vk.image_type == VK_IMAGE_TYPE_3D)
depth_center_offset = 0.5 / num_layers * (src_end - src_start);
if (flip_z) {
@ -1031,20 +1030,20 @@ void anv_CmdClearColorImage(
imageLayout, ISL_AUX_USAGE_NONE, &surf);
struct anv_format_plane src_format =
anv_get_format_aspect(&cmd_buffer->device->info, image->vk_format,
VK_IMAGE_ASPECT_COLOR_BIT, image->tiling);
anv_get_format_aspect(&cmd_buffer->device->info, image->vk.format,
VK_IMAGE_ASPECT_COLOR_BIT, image->vk.tiling);
unsigned base_layer = pRanges[r].baseArrayLayer;
unsigned layer_count = anv_get_layerCount(image, &pRanges[r]);
for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) {
const unsigned level = pRanges[r].baseMipLevel + i;
const unsigned level_width = anv_minify(image->extent.width, level);
const unsigned level_height = anv_minify(image->extent.height, level);
const unsigned level_width = anv_minify(image->vk.extent.width, level);
const unsigned level_height = anv_minify(image->vk.extent.height, level);
if (image->type == VK_IMAGE_TYPE_3D) {
if (image->vk.image_type == VK_IMAGE_TYPE_3D) {
base_layer = 0;
layer_count = anv_minify(image->extent.depth, level);
layer_count = anv_minify(image->vk.extent.depth, level);
}
anv_cmd_buffer_mark_image_written(cmd_buffer, image,
@ -1078,7 +1077,7 @@ void anv_CmdClearDepthStencilImage(
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
struct blorp_surf depth, stencil, stencil_shadow;
if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
if (image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
get_blorp_surf_for_anv_image(cmd_buffer->device,
image, VK_IMAGE_ASPECT_DEPTH_BIT,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
@ -1088,7 +1087,7 @@ void anv_CmdClearDepthStencilImage(
}
bool has_stencil_shadow = false;
if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
if (image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
get_blorp_surf_for_anv_image(cmd_buffer->device,
image, VK_IMAGE_ASPECT_STENCIL_BIT,
VK_IMAGE_USAGE_TRANSFER_DST_BIT,
@ -1114,11 +1113,11 @@ void anv_CmdClearDepthStencilImage(
for (unsigned i = 0; i < anv_get_levelCount(image, &pRanges[r]); i++) {
const unsigned level = pRanges[r].baseMipLevel + i;
const unsigned level_width = anv_minify(image->extent.width, level);
const unsigned level_height = anv_minify(image->extent.height, level);
const unsigned level_width = anv_minify(image->vk.extent.width, level);
const unsigned level_height = anv_minify(image->vk.extent.height, level);
if (image->type == VK_IMAGE_TYPE_3D)
layer_count = anv_minify(image->extent.depth, level);
if (image->vk.image_type == VK_IMAGE_TYPE_3D)
layer_count = anv_minify(image->vk.extent.depth, level);
blorp_clear_depth_stencil(&batch, &depth, &stencil,
level, base_layer, layer_count,
@ -1385,10 +1384,10 @@ anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
assert(src_image->type == VK_IMAGE_TYPE_2D);
assert(src_image->samples > 1);
assert(dst_image->type == VK_IMAGE_TYPE_2D);
assert(dst_image->samples == 1);
assert(src_image->vk.image_type == VK_IMAGE_TYPE_2D);
assert(src_image->vk.samples > 1);
assert(dst_image->vk.image_type == VK_IMAGE_TYPE_2D);
assert(dst_image->vk.samples == 1);
assert(src_image->n_planes == dst_image->n_planes);
struct blorp_surf src_surf, dst_surf;
@ -1533,13 +1532,9 @@ anv_image_copy_to_shadow(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t l = 0; l < level_count; l++) {
const uint32_t level = base_level + l;
const VkExtent3D extent = {
.width = anv_minify(image->extent.width, level),
.height = anv_minify(image->extent.height, level),
.depth = anv_minify(image->extent.depth, level),
};
const VkExtent3D extent = vk_image_mip_level_extent(&image->vk, level);
if (image->type == VK_IMAGE_TYPE_3D)
if (image->vk.image_type == VK_IMAGE_TYPE_3D)
layer_count = extent.depth;
for (uint32_t a = 0; a < layer_count; a++) {
@ -1568,7 +1563,7 @@ anv_image_clear_color(struct anv_cmd_buffer *cmd_buffer,
uint32_t level, uint32_t base_layer, uint32_t layer_count,
VkRect2D area, union isl_color_value clear_color)
{
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
/* We don't support planar images with multisampling yet */
assert(image->n_planes == 1);
@ -1604,8 +1599,8 @@ anv_image_clear_depth_stencil(struct anv_cmd_buffer *cmd_buffer,
VkRect2D area,
float depth_value, uint8_t stencil_value)
{
assert(image->aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT));
assert(image->vk.aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT));
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
@ -1711,8 +1706,8 @@ anv_image_hiz_clear(struct anv_cmd_buffer *cmd_buffer,
uint32_t base_layer, uint32_t layer_count,
VkRect2D area, uint8_t stencil_value)
{
assert(image->aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT));
assert(image->vk.aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT));
struct blorp_batch batch;
blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0);
@ -1802,8 +1797,8 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,
enum isl_aux_op mcs_op, union isl_color_value *clear_value,
bool predicate)
{
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->samples > 1);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.samples > 1);
assert(base_layer + layer_count <= anv_image_aux_layers(image, aspect, 0));
/* Multisampling with multi-planar formats is not supported */
@ -1851,7 +1846,7 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,
case ISL_AUX_OP_FAST_CLEAR:
blorp_fast_clear(&batch, &surf, format, swizzle,
0, base_layer, layer_count,
0, 0, image->extent.width, image->extent.height);
0, 0, image->vk.extent.width, image->vk.extent.height);
break;
case ISL_AUX_OP_PARTIAL_RESOLVE:
blorp_mcs_partial_resolve(&batch, &surf, format,
@ -1880,8 +1875,8 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
enum isl_aux_op ccs_op, union isl_color_value *clear_value,
bool predicate)
{
assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
assert(image->samples == 1);
assert(image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
assert(image->vk.samples == 1);
assert(level < anv_image_aux_levels(image, aspect));
/* Multi-LOD YcBcR is not allowed */
assert(image->n_planes == 1 || level == 0);

317
src/intel/vulkan/anv_image.c
View file

@ -63,7 +63,7 @@ image_aspect_to_binding(struct anv_image *image, VkImageAspectFlags aspect)
assert(image->disjoint);
if (image->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
if (image->vk.tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
/* Spec requires special aspects for modifier images. */
assert(aspect >= VK_IMAGE_ASPECT_MEMORY_PLANE_0_BIT_EXT &&
aspect <= VK_IMAGE_ASPECT_MEMORY_PLANE_3_BIT_EXT);
@ -459,8 +459,8 @@ add_aux_state_tracking_buffer(struct anv_device *device,
{
assert(image && device);
assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
image->aspects & (VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV |
VK_IMAGE_ASPECT_DEPTH_BIT));
image->vk.aspects & (VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV |
VK_IMAGE_ASPECT_DEPTH_BIT));
const unsigned clear_color_state_size = device->info.ver >= 10 ?
device->isl_dev.ss.clear_color_state_size :
@ -471,11 +471,11 @@ add_aux_state_tracking_buffer(struct anv_device *device,
/* We only need to track compression on CCS_E surfaces. */
if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
if (image->type == VK_IMAGE_TYPE_3D) {
for (uint32_t l = 0; l < image->levels; l++)
state_size += anv_minify(image->extent.depth, l) * 4;
if (image->vk.image_type == VK_IMAGE_TYPE_3D) {
for (uint32_t l = 0; l < image->vk.mip_levels; l++)
state_size += anv_minify(image->vk.extent.depth, l) * 4;
} else {
state_size += image->levels * image->array_size * 4;
state_size += image->vk.mip_levels * image->vk.array_layers * 4;
}
}
@ -526,28 +526,28 @@ add_aux_surface_if_supported(struct anv_device *device,
/* We don't advertise that depth buffers could be used as storage
* images.
*/
assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
assert(!(image->vk.usage & VK_IMAGE_USAGE_STORAGE_BIT));
/* Allow the user to control HiZ enabling. Disable by default on gfx7
* because resolves are not currently implemented pre-BDW.
*/
if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
if (!(image->vk.usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
/* It will never be used as an attachment, HiZ is pointless. */
return VK_SUCCESS;
}
if (device->info.ver == 7) {
anv_perf_warn(device, &image->base, "Implement gfx7 HiZ");
anv_perf_warn(device, &image->vk.base, "Implement gfx7 HiZ");
return VK_SUCCESS;
}
if (image->levels > 1) {
anv_perf_warn(device, &image->base, "Enable multi-LOD HiZ");
if (image->vk.mip_levels > 1) {
anv_perf_warn(device, &image->vk.base, "Enable multi-LOD HiZ");
return VK_SUCCESS;
}
if (device->info.ver == 8 && image->samples > 1) {
anv_perf_warn(device, &image->base, "Enable gfx8 multisampled HiZ");
if (device->info.ver == 8 && image->vk.samples > 1) {
anv_perf_warn(device, &image->vk.base, "Enable gfx8 multisampled HiZ");
return VK_SUCCESS;
}
@ -562,9 +562,9 @@ add_aux_surface_if_supported(struct anv_device *device,
&image->planes[plane].primary_surface.isl,
&image->planes[plane].aux_surface.isl)) {
image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
} else if (image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) &&
image->samples == 1) {
} else if (image->vk.usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) &&
image->vk.samples == 1) {
/* If it's used as an input attachment or a texture and it's
* single-sampled (this is a requirement for HiZ+CCS write-through
* mode), use write-through mode so that we don't need to resolve
@ -599,7 +599,7 @@ add_aux_surface_if_supported(struct anv_device *device,
return VK_SUCCESS;
image->planes[plane].aux_usage = ISL_AUX_USAGE_STC_CCS;
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples == 1) {
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->vk.samples == 1) {
if (image->n_planes != 1) {
/* Multiplanar images seem to hit a sampler bug with CCS and R16G16
* format. (Putting the clear state a page/4096bytes further fixes
@ -608,7 +608,7 @@ add_aux_surface_if_supported(struct anv_device *device,
return VK_SUCCESS;
}
if ((image->create_flags & VK_IMAGE_CREATE_ALIAS_BIT)) {
if ((image->vk.create_flags & VK_IMAGE_CREATE_ALIAS_BIT)) {
/* The image may alias a plane of a multiplanar image. Above we ban
* CCS on multiplanar images.
*
@ -627,20 +627,20 @@ add_aux_surface_if_supported(struct anv_device *device,
* CCS for this case, we currently don't have things hooked up to get
* it working.
*/
anv_perf_warn(device, &image->base,
anv_perf_warn(device, &image->vk.base,
"This image format doesn't support rendering. "
"Not allocating an CCS buffer.");
return VK_SUCCESS;
}
if (device->info.ver >= 12 && image->array_size > 1) {
if (device->info.ver >= 12 && image->vk.array_layers > 1) {
/* HSD 14010672564: On TGL, if a block of fragment shader outputs
* match the surface's clear color, the HW may convert them to
* fast-clears. Anv only does clear color tracking for the first
* slice unfortunately. Disable CCS until anv gains more clear color
* tracking abilities.
*/
anv_perf_warn(device, &image->base,
anv_perf_warn(device, &image->vk.base,
"HW may put fast-clear blocks on more slices than SW "
"currently tracks. Not allocating a CCS buffer.");
return VK_SUCCESS;
@ -658,11 +658,11 @@ add_aux_surface_if_supported(struct anv_device *device,
return VK_SUCCESS;
/* Choose aux usage */
if (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
if (!(image->vk.usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
anv_formats_ccs_e_compatible(&device->info,
image->create_flags,
image->vk_format,
image->tiling,
image->vk.create_flags,
image->vk.format,
image->vk.tiling,
fmt_list)) {
/* For images created without MUTABLE_FORMAT_BIT set, we know that
* they will always be used with the original format. In particular,
@ -674,7 +674,7 @@ add_aux_surface_if_supported(struct anv_device *device,
*/
image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
} else if (device->info.ver >= 12) {
anv_perf_warn(device, &image->base,
anv_perf_warn(device, &image->vk.base,
"The CCS_D aux mode is not yet handled on "
"Gfx12+. Not allocating a CCS buffer.");
image->planes[plane].aux_surface.isl.size_B = 0;
@ -698,8 +698,8 @@ add_aux_surface_if_supported(struct anv_device *device,
}
return add_aux_state_tracking_buffer(device, image, plane);
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples > 1) {
assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->vk.samples > 1) {
assert(!(image->vk.usage & VK_IMAGE_USAGE_STORAGE_BIT));
ok = isl_surf_get_mcs_surf(&device->isl_dev,
&image->planes[plane].primary_surface.isl,
&image->planes[plane].aux_surface.isl);
@ -732,14 +732,14 @@ add_shadow_surface(struct anv_device *device,
ok = isl_surf_init(&device->isl_dev,
&image->planes[plane].shadow_surface.isl,
.dim = vk_to_isl_surf_dim[image->type],
.dim = vk_to_isl_surf_dim[image->vk.image_type],
.format = plane_format.isl_format,
.width = image->extent.width,
.height = image->extent.height,
.depth = image->extent.depth,
.levels = image->levels,
.array_len = image->array_size,
.samples = image->samples,
.width = image->vk.extent.width,
.height = image->vk.extent.height,
.depth = image->vk.extent.depth,
.levels = image->vk.mip_levels,
.array_len = image->vk.array_layers,
.samples = image->vk.samples,
.min_alignment_B = 0,
.row_pitch_B = stride,
.usage = ISL_SURF_USAGE_TEXTURE_BIT |
@ -776,14 +776,14 @@ add_primary_surface(struct anv_device *device,
bool ok;
ok = isl_surf_init(&device->isl_dev, &anv_surf->isl,
.dim = vk_to_isl_surf_dim[image->type],
.dim = vk_to_isl_surf_dim[image->vk.image_type],
.format = plane_format.isl_format,
.width = image->extent.width / plane_format.denominator_scales[0],
.height = image->extent.height / plane_format.denominator_scales[1],
.depth = image->extent.depth,
.levels = image->levels,
.array_len = image->array_size,
.samples = image->samples,
.width = image->vk.extent.width / plane_format.denominator_scales[0],
.height = image->vk.extent.height / plane_format.denominator_scales[1],
.depth = image->vk.extent.depth,
.levels = image->vk.mip_levels,
.array_len = image->vk.array_layers,
.samples = image->vk.samples,
.min_alignment_B = 0,
.row_pitch_B = stride,
.usage = isl_usage,
@ -878,7 +878,7 @@ check_memory_bindings(const struct anv_device *device,
/* Aliasing is incompatible with the private binding because it does not
* live in a VkDeviceMemory.
*/
assert(!(image->create_flags & VK_IMAGE_CREATE_ALIAS_BIT) ||
assert(!(image->vk.create_flags & VK_IMAGE_CREATE_ALIAS_BIT) ||
image->bindings[ANV_IMAGE_MEMORY_BINDING_PRIVATE].memory_range.size == 0);
/* Check primary surface */
@ -958,7 +958,7 @@ check_drm_format_mod(const struct anv_device *device,
{
/* Image must have a modifier if and only if it has modifier tiling. */
assert((image->drm_format_mod != DRM_FORMAT_MOD_INVALID) ==
(image->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT));
(image->vk.tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT));
if (image->drm_format_mod == DRM_FORMAT_MOD_INVALID)
return VK_SUCCESS;
@ -970,12 +970,12 @@ check_drm_format_mod(const struct anv_device *device,
assert(isl_drm_modifier_get_score(&device->info, isl_mod_info->modifier));
/* Enforced by us, not the Vulkan spec. */
assert(image->type == VK_IMAGE_TYPE_2D);
assert(!(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT));
assert(!(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT));
assert(image->levels == 1);
assert(image->array_size == 1);
assert(image->samples == 1);
assert(image->vk.image_type == VK_IMAGE_TYPE_2D);
assert(!(image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT));
assert(!(image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT));
assert(image->vk.mip_levels == 1);
assert(image->vk.array_layers == 1);
assert(image->vk.samples == 1);
for (int i = 0; i < image->n_planes; ++i) {
const struct anv_image_plane *plane = &image->planes[i];
@ -997,7 +997,7 @@ check_drm_format_mod(const struct anv_device *device,
* usage, then we may enable a private aux surface.
*/
if (plane->aux_usage != isl_mod_info->aux_usage) {
return vk_errorf(device, &image->base, VK_ERROR_UNKNOWN,
return vk_errorf(device, &image->vk.base, VK_ERROR_UNKNOWN,
"image with modifier unexpectedly has wrong aux "
"usage");
}
@ -1026,22 +1026,15 @@ add_all_surfaces_implicit_layout(
create_info->isl_extra_usage_flags;
VkResult result;
const VkExternalMemoryImageCreateInfo *ext_mem_info =
vk_find_struct_const(create_info->vk_info,
EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
u_foreach_bit(b, image->aspects) {
u_foreach_bit(b, image->vk.aspects) {
VkImageAspectFlagBits aspect = 1 << b;
const uint32_t plane = anv_image_aspect_to_plane(image, aspect);
const struct anv_format_plane plane_format =
anv_get_format_plane(devinfo, image->vk_format, plane, image->tiling);
VkImageUsageFlags vk_usage = image->usage;
if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT)
vk_usage = image->stencil_usage;
anv_get_format_plane(devinfo, image->vk.format, plane, image->vk.tiling);
VkImageUsageFlags vk_usage = vk_image_usage(&image->vk, aspect);
isl_surf_usage_flags_t isl_usage =
choose_isl_surf_usage(image->create_flags, vk_usage,
choose_isl_surf_usage(image->vk.create_flags, vk_usage,
isl_extra_usage_flags, aspect);
/* Must call this before adding any surfaces because it may modify
@ -1049,8 +1042,8 @@ add_all_surfaces_implicit_layout(
*/
bool needs_shadow =
anv_image_plane_needs_shadow_surface(devinfo, plane_format,
image->tiling, vk_usage,
image->create_flags,
image->vk.tiling, vk_usage,
image->vk.create_flags,
&isl_tiling_flags);
result = add_primary_surface(device, image, plane, plane_format,
@ -1067,8 +1060,8 @@ add_all_surfaces_implicit_layout(
}
/* Disable aux if image supports export without modifiers. */
if (ext_mem_info && ext_mem_info->handleTypes != 0 &&
image->tiling != VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT)
if (image->vk.external_handle_types != 0 &&
image->vk.tiling != VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT)
continue;
result = add_aux_surface_if_supported(device, image, plane, plane_format,
@ -1124,9 +1117,9 @@ add_all_surfaces_explicit_layout(
* for external multi-planar images.
*/
if (image->n_planes == 1)
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
else
assert(!(image->aspects & ~VK_IMAGE_ASPECT_PLANES_BITS_ANV));
assert(!(image->vk.aspects & ~VK_IMAGE_ASPECT_PLANES_BITS_ANV));
if (mod_has_aux)
assert(image->n_planes == 1 && mod_plane_count == 2);
@ -1151,11 +1144,11 @@ add_all_surfaces_explicit_layout(
}
}
u_foreach_bit(b, image->aspects) {
u_foreach_bit(b, image->vk.aspects) {
const VkImageAspectFlagBits aspect = 1 << b;
const uint32_t plane = anv_image_aspect_to_plane(image, aspect);
const struct anv_format_plane format_plane =
anv_get_format_plane(devinfo, image->vk_format, plane, image->tiling);
anv_get_format_plane(devinfo, image->vk.format, plane, image->vk.tiling);
const VkSubresourceLayout *primary_layout = &drm_info->pPlaneLayouts[plane];
result = add_primary_surface(device, image, plane,
@ -1271,14 +1264,17 @@ anv_image_create(VkDevice _device,
struct anv_image *image = NULL;
VkResult r;
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
image = vk_image_create(&device->vk, pCreateInfo, alloc, sizeof(*image));
if (image == NULL)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
image->vk.usage = anv_image_create_usage(pCreateInfo, image->vk.usage);
image->vk.stencil_usage =
anv_image_create_usage(pCreateInfo, image->vk.stencil_usage);
const struct wsi_image_create_info *wsi_info =
vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
const VkExternalFormatANDROID *ext_format =
vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_FORMAT_ANDROID);
if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
mod_explicit_info =
vk_find_struct_const(pCreateInfo->pNext,
@ -1297,48 +1293,10 @@ anv_image_create(VkDevice _device,
assert(isl_mod_info);
}
anv_assert(pCreateInfo->mipLevels > 0);
anv_assert(pCreateInfo->arrayLayers > 0);
anv_assert(pCreateInfo->samples > 0);
anv_assert(pCreateInfo->extent.width > 0);
anv_assert(pCreateInfo->extent.height > 0);
anv_assert(pCreateInfo->extent.depth > 0);
image = vk_object_zalloc(&device->vk, alloc, sizeof(*image),
VK_OBJECT_TYPE_IMAGE);
if (!image)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
image->type = pCreateInfo->imageType;
image->extent = anv_sanitize_image_extent(pCreateInfo->imageType,
pCreateInfo->extent);
image->vk_format = pCreateInfo->format;
image->aspects = vk_format_aspects(image->vk_format);
image->levels = pCreateInfo->mipLevels;
image->array_size = pCreateInfo->arrayLayers;
image->samples = pCreateInfo->samples;
image->usage = anv_image_create_usage(pCreateInfo, pCreateInfo->usage);
image->create_flags = pCreateInfo->flags;
image->tiling = pCreateInfo->tiling;
image->needs_set_tiling = wsi_info && wsi_info->scanout;
image->drm_format_mod = isl_mod_info ? isl_mod_info->modifier :
DRM_FORMAT_MOD_INVALID;
if (ext_format && ext_format->externalFormat != 0)
image->has_android_external_format = true;
if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
image->stencil_usage = pCreateInfo->usage;
const VkImageStencilUsageCreateInfoEXT *stencil_usage_info =
vk_find_struct_const(pCreateInfo->pNext,
IMAGE_STENCIL_USAGE_CREATE_INFO_EXT);
if (stencil_usage_info) {
image->stencil_usage =
anv_image_create_usage(pCreateInfo,
stencil_usage_info->stencilUsage);
}
}
for (int i = 0; i < ANV_IMAGE_MEMORY_BINDING_END; ++i) {
image->bindings[i] = (struct anv_image_binding) {
.memory_range = { .binding = i },
@ -1346,16 +1304,14 @@ anv_image_create(VkDevice _device,
}
/* In case of AHardwareBuffer import, we don't know the layout yet */
const VkExternalMemoryImageCreateInfo *ext_mem_info =
vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
if (ext_mem_info && (ext_mem_info->handleTypes &
VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID)) {
if (image->vk.external_handle_types &
VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID) {
image->from_ahb = true;
*pImage = anv_image_to_handle(image);
return VK_SUCCESS;
}
image->n_planes = anv_get_format_planes(image->vk_format);
image->n_planes = anv_get_format_planes(image->vk.format);
/* The Vulkan 1.2.165 glossary says:
*
@ -1401,7 +1357,7 @@ anv_image_create(VkDevice _device,
return VK_SUCCESS;
fail:
vk_object_free(&device->vk, alloc, image);
vk_image_destroy(&device->vk, alloc, &image->vk);
return r;
}
@ -1445,7 +1401,7 @@ anv_image_from_swapchain(VkDevice device,
* #swapchain-wsi-image-create-info .
*/
assert(local_create_info.tiling == VK_IMAGE_TILING_OPTIMAL);
local_create_info.tiling = swapchain_image->tiling;
local_create_info.tiling = swapchain_image->vk.tiling;
VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info = {
.sType = VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT,
@ -1456,15 +1412,15 @@ anv_image_from_swapchain(VkDevice device,
if (swapchain_image->drm_format_mod != DRM_FORMAT_MOD_INVALID)
__vk_append_struct(&local_create_info, &local_modifier_info);
assert(swapchain_image->type == local_create_info.imageType);
assert(swapchain_image->vk_format == local_create_info.format);
assert(swapchain_image->extent.width == local_create_info.extent.width);
assert(swapchain_image->extent.height == local_create_info.extent.height);
assert(swapchain_image->extent.depth == local_create_info.extent.depth);
assert(swapchain_image->array_size == local_create_info.arrayLayers);
assert(swapchain_image->samples == local_create_info.samples);
assert(swapchain_image->tiling == local_create_info.tiling);
assert(swapchain_image->usage == local_create_info.usage);
assert(swapchain_image->vk.image_type == local_create_info.imageType);
assert(swapchain_image->vk.format == local_create_info.format);
assert(swapchain_image->vk.extent.width == local_create_info.extent.width);
assert(swapchain_image->vk.extent.height == local_create_info.extent.height);
assert(swapchain_image->vk.extent.depth == local_create_info.extent.depth);
assert(swapchain_image->vk.array_layers == local_create_info.arrayLayers);
assert(swapchain_image->vk.samples == local_create_info.samples);
assert(swapchain_image->vk.tiling == local_create_info.tiling);
assert(swapchain_image->vk.usage == local_create_info.usage);
return anv_image_create(device,
&(struct anv_image_create_info) {
@ -1529,7 +1485,7 @@ anv_DestroyImage(VkDevice _device, VkImage _image,
if (private_bo)
anv_device_release_bo(device, private_bo);
vk_object_free(&device->vk, pAllocator, image);
vk_image_destroy(&device->vk, pAllocator, &image->vk);
}
/* We are binding AHardwareBuffer. Get a description, resolve the
@ -1592,9 +1548,8 @@ resolve_ahw_image(struct anv_device *device,
/* Now we are able to fill anv_image fields properly and create
* isl_surface for it.
*/
image->vk_format = vk_format;
image->aspects = vk_format_aspects(image->vk_format);
image->n_planes = anv_get_format_planes(image->vk_format);
vk_image_set_format(&image->vk, vk_format);
image->n_planes = anv_get_format_planes(image->vk.format);
uint32_t stride = desc.stride *
(isl_format_get_layout(isl_fmt)->bpb / 8);
@ -1778,7 +1733,7 @@ VkResult anv_BindImageMemory2(
anv_swapchain_get_image(swapchain_info->swapchain,
swapchain_info->imageIndex);
assert(swapchain_image);
assert(image->aspects == swapchain_image->aspects);
assert(image->vk.aspects == swapchain_image->vk.aspects);
assert(mem == NULL);
for (int j = 0; j < ARRAY_SIZE(image->bindings); ++j)
@ -1871,7 +1826,7 @@ void anv_GetImageSubresourceLayout(
* But it incorrectly uses VK_IMAGE_ASPECT_PLANE_*, so we have a temporary
* workaround.
*/
if (image->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
if (image->vk.tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
/* TODO(chadv): Drop this workaround when WSI gets fixed. */
uint32_t mem_plane;
switch (subresource->aspectMask) {
@ -1924,9 +1879,9 @@ void anv_GetImageSubresourceLayout(
0 /* logical_z_offset_px */,
&offset_B, NULL, NULL);
layout->offset += offset_B;
layout->size = layout->rowPitch * anv_minify(image->extent.height,
layout->size = layout->rowPitch * anv_minify(image->vk.extent.height,
subresource->mipLevel) *
image->extent.depth;
image->vk.extent.depth;
} else {
layout->size = surface->memory_range.size;
}
@ -2129,7 +2084,7 @@ anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
assert(image != NULL);
/* The aspect must be exactly one of the image aspects. */
assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
assert(util_bitcount(aspect) == 1 && (aspect & image->vk.aspects));
/* Determine the optimal buffer. */
@ -2159,7 +2114,7 @@ anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
return ISL_AUX_STATE_AUX_INVALID;
case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR: {
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
enum isl_aux_state aux_state =
isl_drm_modifier_get_default_aux_state(image->drm_format_mod);
@ -2194,8 +2149,7 @@ anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
const bool read_only = vk_image_layout_is_read_only(layout, aspect);
const VkImageUsageFlags image_aspect_usage =
aspect == VK_IMAGE_ASPECT_STENCIL_BIT ? image->stencil_usage :
image->usage;
vk_image_usage(&image->vk, aspect);
const VkImageUsageFlags usage =
vk_image_layout_to_usage_flags(layout, aspect) & image_aspect_usage;
@ -2347,9 +2301,9 @@ anv_layout_to_aux_usage(const struct intel_device_info * const devinfo,
unreachable("We never use this state");
case ISL_AUX_STATE_PARTIAL_CLEAR:
assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
assert(image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D);
assert(image->samples == 1);
assert(image->vk.samples == 1);
return ISL_AUX_USAGE_CCS_D;
case ISL_AUX_STATE_COMPRESSED_CLEAR:
@ -2409,7 +2363,7 @@ anv_layout_to_fast_clear_type(const struct intel_device_info * const devinfo,
/* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
* lack the MI ALU which we need to determine the predicates.
*/
if (devinfo->verx10 == 70 && image->samples > 1)
if (devinfo->verx10 == 70 && image->vk.samples > 1)
return ANV_FAST_CLEAR_NONE;
enum isl_aux_state aux_state =
@ -2686,56 +2640,28 @@ anv_CreateImageView(VkDevice _device,
const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
assert(range->layerCount > 0);
assert(range->baseMipLevel < image->levels);
assert(range->baseMipLevel < image->vk.mip_levels);
/* Check if a conversion info was passed. */
const struct anv_format *conv_format = NULL;
const VkSamplerYcbcrConversionInfo *conv_info =
vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
/* If image has an external format, the pNext chain must contain an instance of
* VKSamplerYcbcrConversionInfo with a conversion object created with the same
* external format as image."
#ifdef ANDROID
/* If image has an external format, the pNext chain must contain an
* instance of VKSamplerYcbcrConversionInfo with a conversion object
* created with the same external format as image."
*/
assert(!image->has_android_external_format || conv_info);
assert(!image->vk.android_external_format || conv_info);
#endif
if (conv_info) {
ANV_FROM_HANDLE(anv_ycbcr_conversion, conversion, conv_info->conversion);
conv_format = conversion->format;
}
VkImageUsageFlags image_usage = image->usage;
if (range->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT)) {
assert(!(range->aspectMask & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV));
/* From the Vulkan 1.2.131 spec:
*
* "If the image was has a depth-stencil format and was created with
* a VkImageStencilUsageCreateInfo structure included in the pNext
* chain of VkImageCreateInfo, the usage is calculated based on the
* subresource.aspectMask provided:
*
* - If aspectMask includes only VK_IMAGE_ASPECT_STENCIL_BIT, the
* implicit usage is equal to
* VkImageStencilUsageCreateInfo::stencilUsage.
*
* - If aspectMask includes only VK_IMAGE_ASPECT_DEPTH_BIT, the
* implicit usage is equal to VkImageCreateInfo::usage.
*
* - If both aspects are included in aspectMask, the implicit usage
* is equal to the intersection of VkImageCreateInfo::usage and
* VkImageStencilUsageCreateInfo::stencilUsage.
*/
if (range->aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT) {
image_usage = image->stencil_usage;
} else if (range->aspectMask == VK_IMAGE_ASPECT_DEPTH_BIT) {
image_usage = image->usage;
} else {
assert(range->aspectMask == (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT));
image_usage = image->usage & image->stencil_usage;
}
}
const VkImageUsageFlags image_usage =
vk_image_usage(&image->vk, range->aspectMask);
const VkImageViewUsageCreateInfo *usage_info =
vk_find_struct_const(pCreateInfo, IMAGE_VIEW_USAGE_CREATE_INFO);
@ -2749,16 +2675,17 @@ anv_CreateImageView(VkDevice _device,
VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT |
VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
switch (image->type) {
switch (image->vk.image_type) {
default:
unreachable("bad VkImageType");
case VK_IMAGE_TYPE_1D:
case VK_IMAGE_TYPE_2D:
assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <=
image->vk.array_layers);
break;
case VK_IMAGE_TYPE_3D:
assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
<= anv_minify(image->extent.depth, range->baseMipLevel));
<= anv_minify(image->vk.extent.depth, range->baseMipLevel));
break;
}
@ -2774,9 +2701,11 @@ anv_CreateImageView(VkDevice _device,
iview->n_planes = anv_image_aspect_get_planes(iview->aspects);
iview->vk_format = pCreateInfo->format;
#ifdef ANDROID
/* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
assert(!image->has_android_external_format ||
assert(!image->vk.android_external_format ||
pCreateInfo->format == VK_FORMAT_UNDEFINED);
#endif
/* Format is undefined, this can happen when using external formats. Set
* view format from the passed conversion info.
@ -2784,29 +2713,25 @@ anv_CreateImageView(VkDevice _device,
if (iview->vk_format == VK_FORMAT_UNDEFINED && conv_format)
iview->vk_format = conv_format->vk_format;
iview->extent = (VkExtent3D) {
.width = anv_minify(image->extent.width , range->baseMipLevel),
.height = anv_minify(image->extent.height, range->baseMipLevel),
.depth = anv_minify(image->extent.depth , range->baseMipLevel),
};
iview->extent = vk_image_mip_level_extent(&image->vk, range->baseMipLevel);
/* Now go through the underlying image selected planes and map them to
* planes in the image view.
*/
anv_foreach_image_aspect_bit(iaspect_bit, image, iview->aspects) {
const uint32_t iplane =
anv_aspect_to_plane(image->aspects, 1UL << iaspect_bit);
anv_aspect_to_plane(image->vk.aspects, 1UL << iaspect_bit);
const uint32_t vplane =
anv_aspect_to_plane(iview->aspects, 1UL << iaspect_bit);
struct anv_format_plane format;
if (image->aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT)) {
if (image->vk.aspects & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT)) {
/* With depth/stencil images, we're always given the full
* depth/stencil format even if we're only taking one aspect.
*/
assert(iview->vk_format == image->vk_format);
assert(iview->vk_format == image->vk.format);
format = anv_get_format_aspect(&device->info, iview->vk_format,
1u << iaspect_bit, image->tiling);
1u << iaspect_bit, image->vk.tiling);
} else {
/* With color images, we have three cases:
*
@ -2827,7 +2752,7 @@ anv_CreateImageView(VkDevice _device,
* format plane based on vplane.
*/
format = anv_get_format_plane(&device->info, iview->vk_format,
vplane, image->tiling);
vplane, image->vk.tiling);
}
iview->planes[vplane].image_plane = iplane;

59
src/intel/vulkan/anv_private.h
View file

@ -66,6 +66,7 @@
#include "vk_alloc.h"
#include "vk_debug_report.h"
#include "vk_device.h"
#include "vk_image.h"
#include "vk_instance.h"
#include "vk_physical_device.h"
#include "vk_shader_module.h"
@ -3947,24 +3948,9 @@ anv_surface_is_valid(const struct anv_surface *surface)
}
struct anv_image {
struct vk_object_base base;
struct vk_image vk;
VkImageType type; /**< VkImageCreateInfo::imageType */
/* The original VkFormat provided by the client. This may not match any
* of the actual surface formats.
*/
VkFormat vk_format;
VkImageAspectFlags aspects;
VkExtent3D extent;
uint32_t levels;
uint32_t array_size;
uint32_t samples; /**< VkImageCreateInfo::samples */
uint32_t n_planes;
VkImageUsageFlags usage; /**< VkImageCreateInfo::usage. */
VkImageUsageFlags stencil_usage;
VkImageCreateFlags create_flags; /* Flags used when creating image. */
VkImageTiling tiling; /** VkImageCreateInfo::tiling */
/** True if this is needs to be bound to an appropriately tiled BO.
*
@ -3993,11 +3979,6 @@ struct anv_image {
*/
bool from_ahb;
/**
* True if an external format was specified
*/
bool has_android_external_format;
/**
* Image was imported from gralloc with VkNativeBufferANDROID. The gralloc bo
* must be released when the image is destroyed.
@ -4080,7 +4061,7 @@ static inline uint32_t
anv_image_aspect_to_plane(const struct anv_image *image,
VkImageAspectFlagBits aspect)
{
return anv_aspect_to_plane(image->aspects, aspect);
return anv_aspect_to_plane(image->vk.aspects, aspect);
}
/* Returns the number of auxiliary buffer levels attached to an image. */
@ -4092,7 +4073,7 @@ anv_image_aux_levels(const struct anv_image * const image,
if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
return 0;
return image->levels;
return image->vk.mip_levels;
}
/* Returns the number of auxiliary buffer layers attached to an image. */
@ -4104,7 +4085,7 @@ anv_image_aux_layers(const struct anv_image * const image,
assert(image);
/* The miplevel must exist in the main buffer. */
assert(miplevel < image->levels);
assert(miplevel < image->vk.mip_levels);
if (miplevel >= anv_image_aux_levels(image, aspect)) {
/* There are no layers with auxiliary data because the miplevel has no
@ -4113,7 +4094,7 @@ anv_image_aux_layers(const struct anv_image * const image,
return 0;
}
return MAX2(image->array_size, image->extent.depth >> miplevel);
return MAX2(image->vk.array_layers, image->vk.extent.depth >> miplevel);
}
static inline struct anv_address MUST_CHECK
@ -4134,8 +4115,8 @@ anv_image_get_clear_color_addr(UNUSED const struct anv_device *device,
const struct anv_image *image,
VkImageAspectFlagBits aspect)
{
assert(image->aspects & (VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV |
VK_IMAGE_ASPECT_DEPTH_BIT));
assert(image->vk.aspects & (VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV |
VK_IMAGE_ASPECT_DEPTH_BIT));
uint32_t plane = anv_image_aspect_to_plane(image, aspect);
const struct anv_image_memory_range *mem_range =
@ -4174,11 +4155,11 @@ anv_image_get_compression_state_addr(const struct anv_device *device,
offset = 4; /* Go past the fast clear type */
if (image->type == VK_IMAGE_TYPE_3D) {
if (image->vk.image_type == VK_IMAGE_TYPE_3D) {
for (uint32_t l = 0; l < level; l++)
offset += anv_minify(image->extent.depth, l) * 4;
offset += anv_minify(image->vk.extent.depth, l) * 4;
} else {
offset += level * image->array_size * 4;
offset += level * image->vk.array_layers * 4;
}
offset += array_layer * 4;
@ -4195,7 +4176,7 @@ static inline bool
anv_can_sample_with_hiz(const struct intel_device_info * const devinfo,
const struct anv_image *image)
{
if (!(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
if (!(image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
return false;
/* For Gfx8-11, there are some restrictions around sampling from HiZ.
@ -4205,7 +4186,7 @@ anv_can_sample_with_hiz(const struct intel_device_info * const devinfo,
* "If this field is set to AUX_HIZ, Number of Multisamples must
* be MULTISAMPLECOUNT_1, and Surface Type cannot be SURFTYPE_3D."
*/
if (image->type == VK_IMAGE_TYPE_3D)
if (image->vk.image_type == VK_IMAGE_TYPE_3D)
return false;
/* Allow this feature on BDW even though it is disabled in the BDW devinfo
@ -4217,7 +4198,7 @@ anv_can_sample_with_hiz(const struct intel_device_info * const devinfo,
if (devinfo->ver != 8 && !devinfo->has_sample_with_hiz)
return false;
return image->samples == 1;
return image->vk.samples == 1;
}
/* Returns true if an MCS-enabled buffer can be sampled from. */
@ -4225,7 +4206,7 @@ static inline bool
anv_can_sample_mcs_with_clear(const struct intel_device_info * const devinfo,
const struct anv_image *image)
{
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
const uint32_t plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_COLOR_BIT);
@ -4355,14 +4336,14 @@ anv_layout_to_fast_clear_type(const struct intel_device_info * const devinfo,
*/
#define anv_get_layerCount(_image, _range) \
((_range)->layerCount == VK_REMAINING_ARRAY_LAYERS ? \
(_image)->array_size - (_range)->baseArrayLayer : (_range)->layerCount)
(_image)->vk.array_layers - (_range)->baseArrayLayer : (_range)->layerCount)
static inline uint32_t
anv_get_levelCount(const struct anv_image *image,
const VkImageSubresourceRange *range)
{
return range->levelCount == VK_REMAINING_MIP_LEVELS ?
image->levels - range->baseMipLevel : range->levelCount;
image->vk.mip_levels - range->baseMipLevel : range->levelCount;
}
static inline VkImageAspectFlags
@ -4372,9 +4353,9 @@ anv_image_expand_aspects(const struct anv_image *image,
/* If the underlying image has color plane aspects and
* VK_IMAGE_ASPECT_COLOR_BIT has been requested, then return the aspects of
* the underlying image. */
if ((image->aspects & VK_IMAGE_ASPECT_PLANES_BITS_ANV) != 0 &&
if ((image->vk.aspects & VK_IMAGE_ASPECT_PLANES_BITS_ANV) != 0 &&
aspects == VK_IMAGE_ASPECT_COLOR_BIT)
return image->aspects;
return image->vk.aspects;
return aspects;
}
@ -4829,7 +4810,7 @@ VK_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, base, VkFence, VK_OBJECT_TYPE_FENCE)
VK_DEFINE_NONDISP_HANDLE_CASTS(anv_event, base, VkEvent, VK_OBJECT_TYPE_EVENT)
VK_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, base, VkFramebuffer,
VK_OBJECT_TYPE_FRAMEBUFFER)
VK_DEFINE_NONDISP_HANDLE_CASTS(anv_image, base, VkImage, VK_OBJECT_TYPE_IMAGE)
VK_DEFINE_NONDISP_HANDLE_CASTS(anv_image, vk.base, VkImage, VK_OBJECT_TYPE_IMAGE)
VK_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, base, VkImageView,
VK_OBJECT_TYPE_IMAGE_VIEW);
VK_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, base, VkPipelineCache,

102
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -416,7 +416,7 @@ anv_can_fast_clear_color_view(struct anv_device * device,
*/
if (iview->planes[0].isl.base_level > 0 ||
iview->planes[0].isl.base_array_layer > 0) {
anv_perf_warn(device, &iview->image->base,
anv_perf_warn(device, &iview->image->vk.base,
"Rendering with multi-lod or multi-layer framebuffer "
"with LOAD_OP_LOAD and baseMipLevel > 0 or "
"baseArrayLayer > 0. Not fast clearing.");
@ -424,7 +424,7 @@ anv_can_fast_clear_color_view(struct anv_device * device,
}
if (num_layers > 1) {
anv_perf_warn(device, &iview->image->base,
anv_perf_warn(device, &iview->image->vk.base,
"Rendering to a multi-layer framebuffer with "
"LOAD_OP_CLEAR. Only fast-clearing the first slice");
}
@ -449,7 +449,7 @@ anv_can_hiz_clear_ds_view(struct anv_device *device,
return true;
/* We must have depth in order to have HiZ */
if (!(iview->image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
if (!(iview->image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
return false;
const enum isl_aux_usage clear_aux_usage =
@ -524,19 +524,19 @@ anv_image_init_aux_tt(struct anv_cmd_buffer *cmd_buffer,
const uint32_t level = base_level + l;
uint32_t logical_array_layer, logical_z_offset_px;
if (image->type == VK_IMAGE_TYPE_3D) {
if (image->vk.image_type == VK_IMAGE_TYPE_3D) {
logical_array_layer = 0;
/* If the given miplevel does not have this layer, then any higher
* miplevels won't either because miplevels only get smaller the
* higher the LOD.
*/
assert(layer < image->extent.depth);
if (layer >= anv_minify(image->extent.depth, level))
assert(layer < image->vk.extent.depth);
if (layer >= anv_minify(image->vk.extent.depth, level))
break;
logical_z_offset_px = layer;
} else {
assert(layer < image->array_size);
assert(layer < image->vk.array_layers);
logical_array_layer = layer;
logical_z_offset_px = 0;
}
@ -737,8 +737,8 @@ transition_stencil_buffer(struct anv_cmd_buffer *cmd_buffer,
const VkRect2D clear_rect = {
.offset.x = 0,
.offset.y = 0,
.extent.width = anv_minify(image->extent.width, level),
.extent.height = anv_minify(image->extent.height, level),
.extent.width = anv_minify(image->vk.extent.width, level),
.extent.height = anv_minify(image->vk.extent.height, level),
};
uint32_t aux_layers =
@ -1005,7 +1005,7 @@ genX(cmd_buffer_mark_image_written)(struct anv_cmd_buffer *cmd_buffer,
uint32_t layer_count)
{
/* The aspect must be exactly one of the image aspects. */
assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
assert(util_bitcount(aspect) == 1 && (aspect & image->vk.aspects));
/* The only compression types with more than just fast-clears are MCS,
* CCS_E, and HiZ. With HiZ we just trust the layout and don't actually
@ -1026,7 +1026,7 @@ init_fast_clear_color(struct anv_cmd_buffer *cmd_buffer,
VkImageAspectFlagBits aspect)
{
assert(cmd_buffer && image);
assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
assert(image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
set_image_fast_clear_state(cmd_buffer, image, aspect,
ANV_FAST_CLEAR_NONE);
@ -1082,7 +1082,7 @@ genX(copy_fast_clear_dwords)(struct anv_cmd_buffer *cmd_buffer,
bool copy_from_surface_state)
{
assert(cmd_buffer && image);
assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
assert(image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
struct anv_address ss_clear_addr = {
.bo = cmd_buffer->device->surface_state_pool.block_pool.bo,
@ -1169,21 +1169,21 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
const struct intel_device_info *devinfo = &device->info;
/* Validate the inputs. */
assert(cmd_buffer);
assert(image && image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
assert(image && image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
/* These values aren't supported for simplicity's sake. */
assert(level_count != VK_REMAINING_MIP_LEVELS &&
layer_count != VK_REMAINING_ARRAY_LAYERS);
/* Ensure the subresource range is valid. */
UNUSED uint64_t last_level_num = base_level + level_count;
const uint32_t max_depth = anv_minify(image->extent.depth, base_level);
UNUSED const uint32_t image_layers = MAX2(image->array_size, max_depth);
const uint32_t max_depth = anv_minify(image->vk.extent.depth, base_level);
UNUSED const uint32_t image_layers = MAX2(image->vk.array_layers, max_depth);
assert((uint64_t)base_layer + layer_count <= image_layers);
assert(last_level_num <= image->levels);
assert(last_level_num <= image->vk.mip_levels);
/* The spec disallows these final layouts. */
assert(final_layout != VK_IMAGE_LAYOUT_UNDEFINED &&
final_layout != VK_IMAGE_LAYOUT_PREINITIALIZED);
const struct isl_drm_modifier_info *isl_mod_info =
image->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT
image->vk.tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT
? isl_drm_modifier_get_info(image->drm_format_mod)
: NULL;
@ -1204,11 +1204,11 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
*/
const bool mod_acquire =
src_queue_external &&
image->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT;
image->vk.tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT;
const bool mod_release =
dst_queue_external &&
image->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT;
image->vk.tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT;
if (initial_layout == final_layout &&
!mod_acquire && !mod_release) {
@ -1224,8 +1224,8 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
* for texturing. The client is about to use it in READ_ONLY_OPTIMAL so
* we need to ensure the shadow copy is up-to-date.
*/
assert(image->tiling != VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT);
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.tiling != VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->planes[plane].primary_surface.isl.tiling == ISL_TILING_LINEAR);
assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR);
assert(isl_format_is_compressed(image->planes[plane].primary_surface.isl.format));
@ -1296,7 +1296,7 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
#if GFX_VER == 12
/* We do not yet support modifiers with aux on gen12. */
assert(image->tiling != VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT);
assert(image->vk.tiling != VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT);
if (initial_layout_undefined) {
if (device->physical->has_implicit_ccs && devinfo->has_aux_map) {
@ -1350,7 +1350,7 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
* can use a fast-clear for MCS because we only ever touch from render
* and texture (no image load store).
*/
if (image->samples == 1) {
if (image->vk.samples == 1) {
for (uint32_t l = 0; l < level_count; l++) {
const uint32_t level = base_level + l;
@ -1384,8 +1384,8 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
}
}
} else {
if (image->samples == 4 || image->samples == 16) {
anv_perf_warn(cmd_buffer->device, &image->base,
if (image->vk.samples == 4 || image->vk.samples == 16) {
anv_perf_warn(cmd_buffer->device, &image->vk.base,
"Doing a potentially unnecessary fast-clear to "
"define an MCS buffer.");
}
@ -1495,7 +1495,7 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer,
if (level == 0 && array_layer == 0 && will_full_fast_clear)
continue;
if (image->samples == 1) {
if (image->vk.samples == 1) {
anv_cmd_predicated_ccs_resolve(cmd_buffer, image,
image->planes[plane].primary_surface.isl.format,
ISL_SWIZZLE_IDENTITY,
@ -2431,9 +2431,9 @@ void genX(CmdPipelineBarrier)(
&pImageMemoryBarriers[i].subresourceRange;
uint32_t base_layer, layer_count;
if (image->type == VK_IMAGE_TYPE_3D) {
if (image->vk.image_type == VK_IMAGE_TYPE_3D) {
base_layer = 0;
layer_count = anv_minify(image->extent.depth, range->baseMipLevel);
layer_count = anv_minify(image->vk.extent.depth, range->baseMipLevel);
} else {
base_layer = range->baseArrayLayer;
layer_count = anv_get_layerCount(image, range);
@ -5756,7 +5756,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
if (iview)
info.view = &iview->planes[0].isl;
if (image && (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) {
if (image && (image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) {
const uint32_t depth_plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_DEPTH_BIT);
const struct anv_surface *depth_surface =
@ -5795,7 +5795,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer)
}
}
if (image && (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT)) {
if (image && (image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT)) {
const uint32_t stencil_plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_STENCIL_BIT);
const struct anv_surface *stencil_surface =
@ -5929,28 +5929,28 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
subpass->attachments[i].stencil_layout;
uint32_t level = iview->planes[0].isl.base_level;
uint32_t width = anv_minify(iview->image->extent.width, level);
uint32_t height = anv_minify(iview->image->extent.height, level);
uint32_t width = anv_minify(iview->image->vk.extent.width, level);
uint32_t height = anv_minify(iview->image->vk.extent.height, level);
bool full_surface_draw =
render_area.offset.x == 0 && render_area.offset.y == 0 &&
render_area.extent.width == width &&
render_area.extent.height == height;
uint32_t base_layer, layer_count;
if (image->type == VK_IMAGE_TYPE_3D) {
if (image->vk.image_type == VK_IMAGE_TYPE_3D) {
base_layer = 0;
layer_count = anv_minify(iview->image->extent.depth, level);
layer_count = anv_minify(iview->image->vk.extent.depth, level);
} else {
base_layer = iview->planes[0].isl.base_array_layer;
layer_count = fb->layers;
}
if (image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
if (image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
bool will_full_fast_clear =
(att_state->pending_clear_aspects & VK_IMAGE_ASPECT_COLOR_BIT) &&
att_state->fast_clear && full_surface_draw;
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
transition_color_buffer(cmd_buffer, image, VK_IMAGE_ASPECT_COLOR_BIT,
level, 1, base_layer, layer_count,
att_state->current_layout, target_layout,
@ -5964,7 +5964,7 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
target_layout);
}
if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
if (image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
bool will_full_fast_clear =
(att_state->pending_clear_aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
att_state->fast_clear && full_surface_draw;
@ -5980,7 +5980,7 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
target_layout);
}
if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
if (image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
bool will_full_fast_clear =
(att_state->pending_clear_aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
att_state->fast_clear && full_surface_draw;
@ -5998,7 +5998,7 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
assert(att_state->pending_clear_aspects == VK_IMAGE_ASPECT_COLOR_BIT);
/* Multi-planar images are not supported as attachments */
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
assert(image->n_planes == 1);
uint32_t base_clear_layer = iview->planes[0].isl.base_array_layer;
@ -6011,7 +6011,7 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
union isl_color_value clear_color = {};
anv_clear_color_from_att_state(&clear_color, att_state, iview);
if (iview->image->samples == 1) {
if (iview->image->vk.samples == 1) {
anv_image_ccs_op(cmd_buffer, image,
iview->planes[0].isl.format,
iview->planes[0].isl.swizzle,
@ -6461,7 +6461,7 @@ cmd_buffer_end_subpass(struct anv_cmd_buffer *cmd_buffer)
struct anv_attachment_state *dst_state =
&cmd_state->attachments[dst_att];
if ((src_iview->image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
if ((src_iview->image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
subpass->depth_resolve_mode != VK_RESOLVE_MODE_NONE_KHR) {
/* MSAA resolves sample from the source attachment. Transition the
@ -6490,7 +6490,7 @@ cmd_buffer_end_subpass(struct anv_cmd_buffer *cmd_buffer)
* blow it all away so we can claim the initial layout is UNDEFINED
* and we'll get a HiZ ambiguate instead of a resolve.
*/
if (dst_iview->image->type != VK_IMAGE_TYPE_3D &&
if (dst_iview->image->vk.image_type != VK_IMAGE_TYPE_3D &&
render_area.offset.x == 0 && render_area.offset.y == 0 &&
render_area.extent.width == dst_iview->extent.width &&
render_area.extent.height == dst_iview->extent.height)
@ -6527,7 +6527,7 @@ cmd_buffer_end_subpass(struct anv_cmd_buffer *cmd_buffer)
fb->layers, filter);
}
if ((src_iview->image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
if ((src_iview->image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
subpass->stencil_resolve_mode != VK_RESOLVE_MODE_NONE_KHR) {
src_state->current_stencil_layout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
@ -6583,13 +6583,13 @@ cmd_buffer_end_subpass(struct anv_cmd_buffer *cmd_buffer)
struct anv_image_view *iview = cmd_state->attachments[a].image_view;;
const struct anv_image *image = iview->image;
if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
if (image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
const uint32_t plane =
anv_image_aspect_to_plane(image, VK_IMAGE_ASPECT_STENCIL_BIT);
if (anv_surface_is_valid(&image->planes[plane].shadow_surface) &&
att_state->current_stencil_layout == VK_IMAGE_LAYOUT_GENERAL) {
assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
assert(image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
anv_image_copy_to_shadow(cmd_buffer, image,
VK_IMAGE_ASPECT_STENCIL_BIT,
iview->planes[plane].isl.base_level, 1,
@ -6620,17 +6620,17 @@ cmd_buffer_end_subpass(struct anv_cmd_buffer *cmd_buffer)
cmd_state->pass->attachments[a].stencil_final_layout;
uint32_t base_layer, layer_count;
if (image->type == VK_IMAGE_TYPE_3D) {
if (image->vk.image_type == VK_IMAGE_TYPE_3D) {
base_layer = 0;
layer_count = anv_minify(iview->image->extent.depth,
layer_count = anv_minify(iview->image->vk.extent.depth,
iview->planes[0].isl.base_level);
} else {
base_layer = iview->planes[0].isl.base_array_layer;
layer_count = fb->layers;
}
if (image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
if (image->vk.aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
assert(image->vk.aspects == VK_IMAGE_ASPECT_COLOR_BIT);
transition_color_buffer(cmd_buffer, image, VK_IMAGE_ASPECT_COLOR_BIT,
iview->planes[0].isl.base_level, 1,
base_layer, layer_count,
@ -6640,14 +6640,14 @@ cmd_buffer_end_subpass(struct anv_cmd_buffer *cmd_buffer)
false /* will_full_fast_clear */);
}
if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
if (image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
transition_depth_buffer(cmd_buffer, image,
base_layer, layer_count,
att_state->current_layout, target_layout,
false /* will_full_fast_clear */);
}
if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
if (image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
transition_stencil_buffer(cmd_buffer, image,
iview->planes[0].isl.base_level, 1,
base_layer, layer_count,

4
src/intel/vulkan/gfx8_cmd_buffer.c
View file

@ -382,7 +382,7 @@ want_stencil_pma_fix(struct anv_cmd_buffer *cmd_buffer)
* 3DSTATE_WM_DEPTH_STENCIL::StencilTestEnable
*/
const bool stc_test_en =
(ds_iview->image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
(ds_iview->image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
pipeline->stencil_test_enable;
/* 3DSTATE_STENCIL_BUFFER::STENCIL_BUFFER_ENABLE &&
@ -390,7 +390,7 @@ want_stencil_pma_fix(struct anv_cmd_buffer *cmd_buffer)
* 3DSTATE_DEPTH_BUFFER::STENCIL_WRITE_ENABLE)
*/
const bool stc_write_en =
(ds_iview->image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
(ds_iview->image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
(cmd_buffer->state.gfx.dynamic.stencil_write_mask.front ||
cmd_buffer->state.gfx.dynamic.stencil_write_mask.back) &&
pipeline->writes_stencil;