From 25d460a8181e92cbeeed079e8d4c8c2c6f8158ae Mon Sep 17 00:00:00 2001 From: Jesse Natalie Date: Mon, 9 Jan 2023 16:44:02 -0800 Subject: [PATCH] dzn: Always align cached pipeline header size to input element align Part-of: --- src/microsoft/vulkan/dzn_pipeline.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/microsoft/vulkan/dzn_pipeline.c b/src/microsoft/vulkan/dzn_pipeline.c index 74d276dc38b..e3f3190fe25 100644 --- a/src/microsoft/vulkan/dzn_pipeline.c +++ b/src/microsoft/vulkan/dzn_pipeline.c @@ -562,12 +562,11 @@ dzn_pipeline_cache_lookup_gfx_pipeline(struct dzn_graphics_pipeline *pipeline, const struct dzn_cached_gfx_pipeline_header *info = (const struct dzn_cached_gfx_pipeline_header *)(cached_blob->data); - size_t offset = sizeof(*info); + size_t offset = ALIGN_POT(sizeof(*info), alignof(D3D12_INPUT_ELEMENT_DESC)); assert(cached_blob->size >= sizeof(*info)); if (info->input_count > 0) { - offset = ALIGN_POT(offset, alignof(D3D12_INPUT_LAYOUT_DESC)); const D3D12_INPUT_ELEMENT_DESC *inputs = (const D3D12_INPUT_ELEMENT_DESC *)((uint8_t *)cached_blob->data + offset);