From 259ba104f79f9f653130865b21bccfab62dd4829 Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Sat, 15 Jul 2023 00:15:12 -0500 Subject: [PATCH] nv50/ir: Support vector movs nir_opt_mov and nir_op_vecN are only the same if the mov is only a single component. Otherwise the vec loop will try to access src[c] where c > 0 which breaks for nir_op_mov. It's uncommon but scalar back-ends can see vector movs so we need to handle this correctly. Fixes: 6513c675ad31 ("nv50/ir/nir: implement nir_alu_instr handling") Reviewed-by: Karol Herbst Reviewed-by: M Henning Part-of: --- src/nouveau/codegen/nv50_ir_from_nir.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/nouveau/codegen/nv50_ir_from_nir.cpp b/src/nouveau/codegen/nv50_ir_from_nir.cpp index d1883ce2303..e8772aeb77b 100644 --- a/src/nouveau/codegen/nv50_ir_from_nir.cpp +++ b/src/nouveau/codegen/nv50_ir_from_nir.cpp @@ -2591,7 +2591,13 @@ Converter::visit(nir_alu_instr *insn) i->sType = sTypes[0]; break; } - case nir_op_mov: + case nir_op_mov: { + LValues &newDefs = convert(&insn->dest); + for (LValues::size_type c = 0u; c < newDefs.size(); ++c) { + mkMov(newDefs[c], getSrc(&insn->src[0], c), dType); + } + break; + } case nir_op_vec2: case nir_op_vec3: case nir_op_vec4: