Improving Vladimirs alpha test fix a bit as it turns out r300Enable didnt correctly disable alpha test. Vertex programs with high vertex count now run a lot faster as software fallback is no longer on. Also disabling 'temp to result'-instructions as they probably violate the spec and dont seem to be something thats needed.

This commit is contained in:
Aapo Tahkola 2005-03-08 03:29:46 +00:00
parent 0bd5373d94
commit 2579c32a5f
5 changed files with 15 additions and 19 deletions

View file

@ -634,7 +634,7 @@ void r300EmitWait(r300ContextPtr rmesa, GLuint flags)
1 * sizeof(int),
__FUNCTION__);
cmd[0].i = 0;
cmd[0].wait.cmd_type = RADEON_CMD_WAIT;
cmd[0].wait.cmd_type = R300_CMD_WAIT;
cmd[0].wait.flags = flags;
}
}

View file

@ -117,7 +117,7 @@ static const struct tnl_pipeline_stage *r300_pipeline[] = {
&_tnl_fog_coordinate_stage,
&_tnl_texgen_stage,
&_tnl_texture_transform_stage,
&_tnl_vertex_program_stage,
//&_tnl_vertex_program_stage,
/* Try again to go to tcl?
* - no good for asymmetric-twoside (do with multipass)

View file

@ -513,6 +513,7 @@ static void r300_render_vb_primitive(r300ContextPtr rmesa,
}
if(num_verts > 65535){ /* not implemented yet */
WARN_ONCE("Too many elts\n");
return;
}
r300EmitElts(ctx, rmesa->state.Elts+start, num_verts);

View file

@ -459,12 +459,12 @@ static void r300Enable(GLcontext* ctx, GLenum cap, GLboolean state)
break;
case GL_ALPHA_TEST:
R200_STATECHANGE(r300, at);
R300_STATECHANGE(r300, at);
if (state) {
r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
R300_ALPHA_TEST_ENABLE;
} else {
r300->hw.at.cmd[R300_AT_ALPHA_TEST] |=
r300->hw.at.cmd[R300_AT_ALPHA_TEST] &=
~R300_ALPHA_TEST_ENABLE;
}
break;
@ -1353,7 +1353,8 @@ void r300_setup_textures(GLcontext *ctx)
}
for(i=0; i < mtu; i++) {
/*if(ctx->Texture.Unit[i].Enabled == 0)
continue;*/
if( ((r300->state.render_inputs & (_TNL_BIT_TEX0<<i))!=0) != ((ctx->Texture.Unit[i].Enabled)!=0) ) {
WARN_ONCE("Mismatch between render_inputs and ctx->Texture.Unit[i].Enabled value.\n");
}
@ -1998,10 +1999,8 @@ void r300ResetHwState(r300ContextPtr r300)
r300_set_blend_state(ctx);
r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
if(ctx->Color.AlphaEnabled)
r300->hw.at.cmd[R300_AT_ALPHA_TEST] |= R300_ALPHA_TEST_ENABLE;
r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled);
/* Initialize magic registers
TODO : learn what they really do, or get rid of
@ -2171,10 +2170,6 @@ void r300ResetHwState(r300ContextPtr r300)
r300->hw.unk4BC8.cmd[2] = 0;
r300->hw.unk4BC8.cmd[3] = 0;
//r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
#if 0
r300->hw.at.cmd[R300_AT_ALPHA_TEST] = 0;
#endif
r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
r300->hw.unk4BD8.cmd[1] = 0;

View file

@ -492,7 +492,7 @@ static void translate_program(struct r300_vertex_program *vp)
for(i=0; i < operands; i++)
src[i]=vpi->SrcReg[i];
#if 1
if(operands == 3){ /* TODO: scalars */
if( CMP_SRCS(src[1], src[2]) || CMP_SRCS(src[0], src[2]) ){
o_inst->op=MAKE_VSF_OP(R300_VPI_OUT_OP_ADD, u_temp_i,
@ -538,7 +538,7 @@ static void translate_program(struct r300_vertex_program *vp)
u_temp_i--;
}
}
#endif
/* these ops need special handling.
Ops that need temp vars should probably be given reg indexes starting at the end of tmp area. */
switch(vpi->Opcode){
@ -759,8 +759,8 @@ static void translate_program(struct r300_vertex_program *vp)
exit(-1);
break;
}
next:
next: ;
#if 0
/* If instruction writes to result and one of the inputs is tmp, we move it at the end of program */
if(vpi->DstReg.File == PROGRAM_OUTPUT){
for(operand_index=0; operand_index < operands; operand_index++)
@ -770,13 +770,13 @@ static void translate_program(struct r300_vertex_program *vp)
break;
}
}
#endif
}
#if 0
/* Put "tmp to result" instructions in */
for(i=0; i < vp->t2rs; i++, o_inst++)
*o_inst=t2rs[i];
#endif
vp->program.length=(o_inst - vp->program.body.i) * 4;
if(u_temp_i < vp->num_temporaries)