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i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN7

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On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.

v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
    Add code comments. re-word wrap the commit message.
    Add a complete bugzillia list.
    Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>
This commit is contained in:
Marius Predut 2015-04-23 18:41:29 +03:00 • committed by Matt Turner
parent d376c3549b
commit 24ecf37ac0
1 changed files with 18 additions and 3 deletions
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21
src/mesa/drivers/dri/i965/gen7_sf_state.c
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@ -198,9 +198,24 @@ upload_sf_state(struct brw_context *brw)
float line_width = float line_width =
roundf(CLAMP(ctx->Line.Width, 0.0, ctx->Const.MaxLineWidth)); roundf(CLAMP(ctx->Line.Width, 0.0, ctx->Const.MaxLineWidth));
uint32_t line_width_u3_7 = U_FIXED(line_width, 7); uint32_t line_width_u3_7 = U_FIXED(line_width, 7);
/* TODO: line width of 0 is not allowed when MSAA enabled */ /* Line width of 0 is not allowed when MSAA enabled */
if (line_width_u3_7 == 0) if (ctx->Multisample._Enabled) {
line_width_u3_7 = 1; if (line_width_u3_7 == 0)
line_width_u3_7 = 1;
} else if (ctx->Line.SmoothFlag && ctx->Line.Width < 1.5) {
/* For 1 pixel line thickness or less, the general
* anti-aliasing algorithm gives up, and a garbage line is
* generated. Setting a Line Width of 0.0 specifies the
* rasterization of the "thinnest" (one-pixel-wide),
* non-antialiased lines.
*
* Lines rendered with zero Line Width are rasterized using
* Grid Intersection Quantization rules as specified by
* bspec section 6.3.12.1 Zero-Width (Cosmetic) Line
* Rasterization.
*/
line_width_u3_7 = 0;
}
dw2 |= line_width_u3_7 << GEN6_SF_LINE_WIDTH_SHIFT; dw2 |= line_width_u3_7 << GEN6_SF_LINE_WIDTH_SHIFT;
} }
if (ctx->Line.SmoothFlag) { if (ctx->Line.SmoothFlag) {