intel/eu/xe2+: Add helpers for constructing registers in 512b units.

These are new variants of the existing brw_reg GRF constructors that
take registers numbers in the new 512b units.  Mainly useful for
thread payload setup code to use register numbers in a format that
matches the BSpec.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26606>
This commit is contained in:
Francisco Jerez 2022-08-16 15:13:02 -07:00 committed by Caio Oliveira
parent 0ffb828513
commit 24e8709d8b

View file

@ -784,6 +784,12 @@ brw_vec1_grf(unsigned nr, unsigned subnr)
return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
static inline struct brw_reg
xe2_vec1_grf(unsigned nr, unsigned subnr)
{
return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, 2 * nr + subnr / 8, subnr % 8);
}
/** Construct float[2] general-purpose register */
static inline struct brw_reg
brw_vec2_grf(unsigned nr, unsigned subnr)
@ -791,6 +797,12 @@ brw_vec2_grf(unsigned nr, unsigned subnr)
return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
static inline struct brw_reg
xe2_vec2_grf(unsigned nr, unsigned subnr)
{
return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, 2 * nr + subnr / 8, subnr % 8);
}
/** Construct float[4] general-purpose register */
static inline struct brw_reg
brw_vec4_grf(unsigned nr, unsigned subnr)
@ -798,6 +810,12 @@ brw_vec4_grf(unsigned nr, unsigned subnr)
return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
static inline struct brw_reg
xe2_vec4_grf(unsigned nr, unsigned subnr)
{
return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, 2 * nr + subnr / 8, subnr % 8);
}
/** Construct float[8] general-purpose register */
static inline struct brw_reg
brw_vec8_grf(unsigned nr, unsigned subnr)
@ -805,6 +823,12 @@ brw_vec8_grf(unsigned nr, unsigned subnr)
return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
static inline struct brw_reg
xe2_vec8_grf(unsigned nr, unsigned subnr)
{
return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, 2 * nr + subnr / 8, subnr % 8);
}
/** Construct float[16] general-purpose register */
static inline struct brw_reg
brw_vec16_grf(unsigned nr, unsigned subnr)
@ -812,12 +836,23 @@ brw_vec16_grf(unsigned nr, unsigned subnr)
return brw_vec16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
static inline struct brw_reg
xe2_vec16_grf(unsigned nr, unsigned subnr)
{
return brw_vec16_reg(BRW_GENERAL_REGISTER_FILE, 2 * nr + subnr / 8, subnr % 8);
}
static inline struct brw_reg
brw_vecn_grf(unsigned width, unsigned nr, unsigned subnr)
{
return brw_vecn_reg(width, BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
static inline struct brw_reg
xe2_vecn_grf(unsigned width, unsigned nr, unsigned subnr)
{
return brw_vecn_reg(width, BRW_GENERAL_REGISTER_FILE, nr + subnr / 8, subnr % 8);
}
static inline struct brw_reg
brw_uw1_grf(unsigned nr, unsigned subnr)