From 2443e45e76b8712cc428d15f96c5203429051af1 Mon Sep 17 00:00:00 2001 From: Iago Toral Quiroga Date: Wed, 19 Jan 2022 09:36:49 +0100 Subject: [PATCH] broadcom/compiler: better document vectorization implications MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Alejandro Piñeiro Part-of: --- src/broadcom/compiler/nir_to_vir.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/broadcom/compiler/nir_to_vir.c b/src/broadcom/compiler/nir_to_vir.c index e93e754c51a..84c8f57fd6d 100644 --- a/src/broadcom/compiler/nir_to_vir.c +++ b/src/broadcom/compiler/nir_to_vir.c @@ -1830,7 +1830,7 @@ mem_vectorize_callback(unsigned align_mul, unsigned align_offset, nir_intrinsic_instr *high, void *data) { - /* Our backend is 32-bit only at present */ + /* TMU general access only supports 32-bit vectors */ if (bit_size != 32) return false; @@ -1873,6 +1873,13 @@ v3d_optimize_nir(struct v3d_compile *c, struct nir_shader *s) NIR_PASS(progress, s, nir_opt_algebraic); NIR_PASS(progress, s, nir_opt_constant_folding); + /* Note that vectorization may undo the load/store scalarization + * pass we run for non 32-bit TMU general load/store by + * converting, for example, 2 consecutive 16-bit loads into a + * single 32-bit load. This is fine (and desirable) as long as + * the resulting 32-bit load meets 32-bit alignment requirements, + * which mem_vectorize_callback() should be enforcing. + */ nir_load_store_vectorize_options vectorize_opts = { .modes = nir_var_mem_ssbo | nir_var_mem_ubo | nir_var_mem_push_const | nir_var_mem_shared |