diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c
index 66debc71355..8f1f734495d 100644
--- a/src/amd/common/ac_nir_lower_ngg.c
+++ b/src/amd/common/ac_nir_lower_ngg.c
@@ -2615,6 +2615,29 @@ export_vertex_params_gfx11(nir_builder *b, nir_def *export_tid, nir_def *num_exp
    nir_pop_if(b, NULL);
 }
 
+static void
+create_output_phis(nir_builder *b, const uint64_t outputs_written, const uint64_t outputs_written_16bit, ac_nir_prerast_out *out)
+{
+   nir_def *undef = nir_undef(b, 1, 32); /* inserted at the start of the shader */
+
+   u_foreach_bit64(slot, outputs_written) {
+      for (unsigned j = 0; j < 4; j++) {
+         if (out->outputs[slot][j])
+            out->outputs[slot][j] = nir_if_phi(b, out->outputs[slot][j], undef);
+      }
+   }
+
+   u_foreach_bit64(i, outputs_written_16bit) {
+      for (unsigned j = 0; j < 4; j++) {
+         if (out->outputs_16bit_hi[i][j])
+            out->outputs_16bit_hi[i][j] = nir_if_phi(b, out->outputs_16bit_hi[i][j], undef);
+
+         if (out->outputs_16bit_lo[i][j])
+            out->outputs_16bit_lo[i][j] = nir_if_phi(b, out->outputs_16bit_lo[i][j], undef);
+      }
+   }
+}
+
 static bool must_wait_attr_ring(enum amd_gfx_level gfx_level, bool has_param_exports)
 {
    return (gfx_level == GFX11 || gfx_level == GFX11_5) && has_param_exports;
@@ -2672,26 +2695,18 @@ nogs_export_vertex_params(nir_builder *b, nir_function_impl *impl,
 
    if (s->options->gfx_level >= GFX11) {
       /* Export varyings for GFX11+ */
-      vs_output outputs[64];
-      const unsigned num_outputs =
-         gather_vs_outputs(b, outputs,
-                           s->options->vs_output_param_offset,
-                           s->out.outputs,
-                           s->out.outputs_16bit_lo,
-                           s->out.outputs_16bit_hi);
-
-      if (!num_outputs)
-         return;
 
       b->cursor = nir_after_cf_node(&if_es_thread->cf_node);
-      create_vertex_param_phis(b, num_outputs, outputs);
+      create_output_phis(b, b->shader->info.outputs_written & ~VARYING_BIT_POS, b->shader->info.outputs_written_16bit, &s->out);
 
       b->cursor = nir_after_impl(impl);
       if (!num_es_threads)
          num_es_threads = nir_load_merged_wave_info_amd(b);
 
-      export_vertex_params_gfx11(b, NULL, num_es_threads, num_outputs, outputs,
-                                 s->options->vs_output_param_offset);
+      ac_nir_store_parameters_to_attr_ring(b, s->options->vs_output_param_offset,
+                                           b->shader->info.outputs_written,
+                                           b->shader->info.outputs_written_16bit,
+                                           &s->out, NULL, num_es_threads);
    } else {
       ac_nir_export_parameters(b, s->options->vs_output_param_offset,
                                  b->shader->info.outputs_written,