diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c index 3d44983dda6..9e541b143f8 100644 --- a/src/gallium/drivers/iris/iris_clear.c +++ b/src/gallium/drivers/iris/iris_clear.c @@ -278,19 +278,11 @@ fast_clear_color(struct iris_context *ice, * contents of the previous draw hit the render target before we resolve * and again afterwards to ensure that the resolve is complete before we * do any more regular drawing. - * - * On Xe2+: - * From Bspec 57340 (r59562): - * - * Synchronization: - * Due to interaction of scaled clearing rectangle with pixel - * scoreboard, we require one of the following commands to be issued. - * - * Requiring tile cache flush bit has been dropped since Xe2. */ iris_emit_end_of_pipe_sync(batch, "fast clear: pre-flush", PIPE_CONTROL_RENDER_TARGET_FLUSH | - (devinfo->verx10 < 200 ? PIPE_CONTROL_TILE_CACHE_FLUSH : 0) | + (devinfo->ver == 12 ? PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | + PIPE_CONTROL_TILE_CACHE_FLUSH : 0) | (devinfo->verx10 == 120 ? PIPE_CONTROL_DEPTH_STALL : 0) | (devinfo->verx10 == 125 ? PIPE_CONTROL_FLUSH_HDC | PIPE_CONTROL_DATA_CACHE_FLUSH : 0) | @@ -298,60 +290,17 @@ fast_clear_color(struct iris_context *ice, /* From the ICL PRMs, Volume 9: Render Engine, State Caching : * - * "Any values referenced by pointers within the RENDER_SURFACE_STATE or - * SAMPLER_STATE (e.g. Clear Color Pointer, Border Color or Indirect - * State Pointer) are considered to be part of that state and any - * changes to these referenced values requires an invalidation of the - * L1 state cache to ensure the new values are being used as part of - * the state. In the case of surface data pointed to by the Surface - * Base Address in RENDER SURFACE STATE, the Texture Cache must be - * invalidated if the surface data changes." + * "Any values referenced by pointers within the RENDER_SURFACE_STATE + * [...] (e.g. Clear Color Pointer, [...]) are considered to be part of + * that state and any changes to these referenced values requires an + * invalidation of the L1 state cache to ensure the new values are being + * used as part of the state. [...]" * - * and From the Render Target Fast Clear section, - * - * "HwManaged FastClear allows SW to store FastClearValue in separate - * graphics allocation, instead of keeping them in RENDER_SURFACE_STATE. - * This behavior can be enabled by setting ClearValueAddressEnable in - * RENDER_SURFACE_STATE. - * - * Proper sequence of commands is as follows: - * - * 1. Storing clear color to allocation. - * 2. Ensuring that step 1. is finished and visible for TextureCache. - * 3. Performing FastClear. - * - * Step 2. is required on products with ClearColorConversion feature. - * This feature is enabled by setting ClearColorConversionEnable. This - * causes HW to read stored color from ClearColorAllocation and write - * back with the native format or RenderTarget - and clear color needs - * to be present and visible. Reading is done from TextureCache, writing - * is done to RenderCache." - * - * We're going to change the clear color. Invalidate the texture cache now - * to ensure the clear color conversion feature works properly. Although - * the docs seem to require invalidating the texture cache after updating - * the clear color allocation, we can do this beforehand so long as we - * ensure: - * - * 1. Step 1 is complete before the texture cache is accessed in step 3. - * 2. We don't access the texture cache between invalidation and step 3. - * - * The second requirement is satisfied because we'll be performing step 1 - * and 3 right after invalidating. The first is satisfied because BLORP - * updates the clear color before performing the fast clear and it performs - * the synchronizations suggested by the Render Target Fast Clear section - * (not quoted here) to ensure its completion. - * - * While we're here, also invalidate the state cache as suggested. - * - * Due to a corruption reported in - * https://gitlab.freedesktop.org/mesa/mesa/-/issues/8853#note_2015707 when - * the clear color doesn´t change, we invalidate both caches always. + * Invalidate the state cache as suggested. */ if (devinfo->ver >= 11) { - iris_emit_pipe_control_flush(batch, "fast clear: pre-flush", - PIPE_CONTROL_STATE_CACHE_INVALIDATE | - PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE); + iris_emit_pipe_control_flush(batch, "fast clear: pre-inval", + PIPE_CONTROL_STATE_CACHE_INVALIDATE); } iris_batch_sync_region_start(batch); diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index a8a138e6464..442e079c63f 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -3088,57 +3088,25 @@ genX(cmd_buffer_update_color_aux_op)(struct anv_cmd_buffer *cmd_buffer, ANV_PIPE_END_OF_PIPE_SYNC_BIT); } - if (next_aux_op == ISL_AUX_OP_FAST_CLEAR && + if (last_aux_op != ISL_AUX_OP_FAST_CLEAR && + next_aux_op == ISL_AUX_OP_FAST_CLEAR && cmd_buffer->device->isl_dev.ss.clear_color_state_size > 0) { - /* From the ICL PRM Vol. 9, "Render Target Fast Clear": - * - * HwManaged FastClear allows SW to store FastClearValue in separate - * graphics allocation, instead of keeping them in - * RENDER_SURFACE_STATE. This behavior can be enabled by setting - * ClearValueAddressEnable in RENDER_SURFACE_STATE. - * - * Proper sequence of commands is as follows: - * - * 1. Storing clear color to allocation - * 2. Ensuring that step 1. is finished and visible for - * TextureCache - * 3. Performing FastClear - * - * Step 2. is required on products with ClearColorConversion feature. - * This feature is enabled by setting ClearColorConversionEnable. - * This causes HW to read stored color from ClearColorAllocation and - * write back with the native format or RenderTarget - and clear - * color needs to be present and visible. Reading is done from - * TextureCache, writing is done to RenderCache. - * - * Invalidate the texture cache so that the clear color conversion - * feature works properly. - */ - anv_add_pending_pipe_bits(cmd_buffer, - ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT, - "Invalidate for clear color conversion"); - /* From the ICL PRM Vol. 9, "State Caching": * * Any values referenced by pointers within the RENDER_SURFACE_STATE - * or SAMPLER_STATE (e.g. Clear Color Pointer, Border Color or - * Indirect State Pointer) are considered to be part of that state - * and any changes to these referenced values requires an - * invalidation of the L1 state cache to ensure the new values are - * being used as part of the state. In the case of surface data - * pointed to by the Surface Base Address in RENDER SURFACE STATE, - * the Texture Cache must be invalidated if the surface data changes. + * [...] (e.g. Clear Color Pointer, [...]) are considered to be part + * of that state and any changes to these referenced values requires + * an invalidation of the L1 state cache to ensure the new values are + * being used as part of the state. [...] * * We could alternatively perform this invalidation when we stop * fast-clearing. A benefit to doing it now, when transitioning to a * fast clear, is that we save a pipe control by combining the state - * cache invalidation with the texture cache invalidation. + * cache invalidation with the texture cache invalidation done on gfx12. */ - if (last_aux_op != ISL_AUX_OP_FAST_CLEAR) { - anv_add_pending_pipe_bits(cmd_buffer, - ANV_PIPE_STATE_CACHE_INVALIDATE_BIT, - "Invalidate for new clear color"); - } + anv_add_pending_pipe_bits(cmd_buffer, + ANV_PIPE_STATE_CACHE_INVALIDATE_BIT, + "Invalidate for new clear color"); } /* Update the auxiliary surface operation, but with one exception. */