nvk: Use ENUM_PACKED for enums instead of PACKED

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26615>
This commit is contained in:
Faith Ekstrand 2023-12-14 19:52:13 -06:00 committed by Marge Bot
parent 45f320e97f
commit 22b99f15b9
7 changed files with 18 additions and 18 deletions

View file

@ -53,19 +53,19 @@ void nak_postprocess_nir(nir_shader *nir, const struct nak_compiler *nak,
nir_variable_mode robust2_modes,
const struct nak_fs_key *fs_key);
enum PACKED nak_ts_domain {
enum ENUM_PACKED nak_ts_domain {
NAK_TS_DOMAIN_ISOLINE = 0,
NAK_TS_DOMAIN_TRIANGLE = 1,
NAK_TS_DOMAIN_QUAD = 2,
};
enum PACKED nak_ts_spacing {
enum ENUM_PACKED nak_ts_spacing {
NAK_TS_SPACING_INTEGER = 0,
NAK_TS_SPACING_FRACT_ODD = 1,
NAK_TS_SPACING_FRACT_EVEN = 2,
};
enum PACKED nak_ts_prims {
enum ENUM_PACKED nak_ts_prims {
NAK_TS_PRIMS_POINTS = 0,
NAK_TS_PRIMS_LINES = 1,
NAK_TS_PRIMS_TRIANGLES_CW = 2,

View file

@ -22,7 +22,7 @@ struct nak_compiler {
struct nir_shader_compiler_options nir_options;
};
enum PACKED nak_attr {
enum ENUM_PACKED nak_attr {
/* System values A */
NAK_ATTR_TESS_LOD_LEFT = 0x000,
NAK_ATTR_TESS_LOD_RIGHT = 0x004,
@ -85,7 +85,7 @@ enum PACKED nak_attr {
NAK_ATTR_FRONT_FACE = 0x3fc,
};
enum PACKED nak_sv {
enum ENUM_PACKED nak_sv {
NAK_SV_LANE_ID = 0x00,
NAK_SV_VERTEX_COUNT = 0x10,
NAK_SV_INVOCATION_ID = 0x11,

View file

@ -5,7 +5,7 @@
#define NVIDIA_VENDOR_ID 0x10de
enum PACKED nv_device_type {
enum ENUM_PACKED nv_device_type {
NV_DEVICE_TYPE_IGP,
NV_DEVICE_TYPE_DIS,
NV_DEVICE_TYPE_SOC,

View file

@ -19,7 +19,7 @@ extern "C" {
#define MME_FERMI_DRAM_COUNT 0xc00
#define MME_FERMI_SCRATCH_COUNT 128
enum PACKED mme_fermi_reg {
enum ENUM_PACKED mme_fermi_reg {
MME_FERMI_REG_ZERO,
MME_FERMI_REG_R1,
MME_FERMI_REG_R2,
@ -30,7 +30,7 @@ enum PACKED mme_fermi_reg {
MME_FERMI_REG_R7,
};
enum PACKED mme_fermi_op {
enum ENUM_PACKED mme_fermi_op {
MME_FERMI_OP_ALU_REG,
MME_FERMI_OP_ADD_IMM,
MME_FERMI_OP_MERGE,
@ -43,7 +43,7 @@ enum PACKED mme_fermi_op {
const char *mme_fermi_op_to_str(enum mme_fermi_op op);
enum PACKED mme_fermi_alu_op {
enum ENUM_PACKED mme_fermi_alu_op {
MME_FERMI_ALU_OP_ADD,
MME_FERMI_ALU_OP_ADDC,
MME_FERMI_ALU_OP_SUB,
@ -81,7 +81,7 @@ enum PACKED mme_fermi_alu_op {
const char *mme_fermi_alu_op_to_str(enum mme_fermi_alu_op op);
enum PACKED mme_fermi_assign_op {
enum ENUM_PACKED mme_fermi_assign_op {
MME_FERMI_ASSIGN_OP_LOAD,
MME_FERMI_ASSIGN_OP_MOVE,
MME_FERMI_ASSIGN_OP_MOVE_SET_MADDR,

View file

@ -18,7 +18,7 @@ extern "C" {
#define MME_TU104_DRAM_COUNT 0xc00
#define MME_TU104_SCRATCH_COUNT 256
enum PACKED mme_tu104_pred {
enum ENUM_PACKED mme_tu104_pred {
MME_TU104_PRED_UUUU,
MME_TU104_PRED_TTTT,
MME_TU104_PRED_FFFF,
@ -39,7 +39,7 @@ enum PACKED mme_tu104_pred {
const char *mme_tu104_pred_to_str(enum mme_tu104_pred pred);
enum PACKED mme_tu104_reg {
enum ENUM_PACKED mme_tu104_reg {
MME_TU104_REG_R0,
MME_TU104_REG_R1,
MME_TU104_REG_R2,
@ -73,7 +73,7 @@ enum PACKED mme_tu104_reg {
MME_TU104_REG_VIRTUAL0 = 32,
};
enum PACKED mme_tu104_alu_op {
enum ENUM_PACKED mme_tu104_alu_op {
MME_TU104_ALU_OP_ADD,
MME_TU104_ALU_OP_ADDC,
MME_TU104_ALU_OP_SUB,
@ -115,7 +115,7 @@ bool mme_tu104_alu_op_has_side_effects(enum mme_tu104_alu_op op);
bool mme_tu104_alu_op_is_control_flow(enum mme_tu104_alu_op op);
bool mme_tu104_alu_op_may_depend_on_mthd(enum mme_tu104_alu_op op);
enum PACKED mme_tu104_out_op {
enum ENUM_PACKED mme_tu104_out_op {
MME_TU104_OUT_OP_NONE,
MME_TU104_OUT_OP_ALU0,
MME_TU104_OUT_OP_ALU1,

View file

@ -14,13 +14,13 @@
struct nv_device_info;
enum PACKED nil_image_dim {
enum ENUM_PACKED nil_image_dim {
NIL_IMAGE_DIM_1D = 1,
NIL_IMAGE_DIM_2D = 2,
NIL_IMAGE_DIM_3D = 3,
};
enum PACKED nil_sample_layout {
enum ENUM_PACKED nil_sample_layout {
NIL_SAMPLE_LAYOUT_1X1,
NIL_SAMPLE_LAYOUT_2X1,
NIL_SAMPLE_LAYOUT_2X2,
@ -42,7 +42,7 @@ enum nil_image_usage_flags {
NIL_IMAGE_USAGE_LINEAR_BIT = BITFIELD_BIT(7),
};
enum PACKED nil_view_type {
enum ENUM_PACKED nil_view_type {
NIL_VIEW_TYPE_1D,
NIL_VIEW_TYPE_2D,
NIL_VIEW_TYPE_3D,

View file

@ -25,7 +25,7 @@ struct vk_shader_module;
#define TU102_SHADER_HEADER_SIZE (32 * 4)
#define NVC0_MAX_SHADER_HEADER_SIZE TU102_SHADER_HEADER_SIZE
enum PACKED nvk_cbuf_type {
enum ENUM_PACKED nvk_cbuf_type {
NVK_CBUF_TYPE_INVALID = 0,
NVK_CBUF_TYPE_ROOT_DESC,
NVK_CBUF_TYPE_DESC_SET,