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synced 2026-05-07 04:58:05 +02:00
anv: expose RT state flushing
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31384>
This commit is contained in:
Lionel Landwerlin
Marge Bot
parent
0ef0b358da
commit
22ab95ae10
2 changed files with 105 additions and 82 deletions
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@ -234,6 +234,9 @@ void genX(cmd_buffer_flush_gfx)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer);
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void genX(cmd_buffer_flush_rt_state)(struct anv_cmd_buffer *cmd_buffer,
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unsigned scratch_size);
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void genX(cmd_buffer_enable_pma_fix)(struct anv_cmd_buffer *cmd_buffer,
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bool enable);
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@ -1207,6 +1207,7 @@ cmd_buffer_emit_rt_dispatch_globals_indirect(struct anv_cmd_buffer *cmd_buffer,
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return rtdg_state;
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}
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#if GFX_VER >= 30
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static uint8_t
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get_stack_id_reduction_cap(uint32_t stack_ids)
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{
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@ -1216,7 +1217,6 @@ get_stack_id_reduction_cap(uint32_t stack_ids)
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* This value must always be smaller than value given by
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* CFE_STATE.Stack_ID_Control.
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*/
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#if GFX_VER >= 30
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switch (stack_ids) {
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case 2048: return REDUCTION_CAP_1024;
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case 1024: return REDUCTION_CAP_512;
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@ -1224,35 +1224,21 @@ get_stack_id_reduction_cap(uint32_t stack_ids)
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case 256: return REDUCTION_CAP_128;
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default: UNREACHABLE("Invalid stack_ids value");
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}
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#endif
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return 0;
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}
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#endif
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static void
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cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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struct trace_params *params)
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cmd_buffer_flush_rt_state(struct anv_cmd_buffer *cmd_buffer,
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unsigned scratch_size)
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{
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struct anv_device *device = cmd_buffer->device;
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struct anv_cmd_ray_tracing_state *rt = &cmd_buffer->state.rt;
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if (INTEL_DEBUG(DEBUG_RT_NO_TRACE))
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return;
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if (anv_batch_has_error(&cmd_buffer->batch))
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return;
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/* If we have a known degenerate launch size, just bail */
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if (!params->is_launch_size_indirect &&
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(params->launch_size[0] == 0 ||
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params->launch_size[1] == 0 ||
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params->launch_size[2] == 0))
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return;
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trace_intel_begin_rays(&cmd_buffer->trace);
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cmd_buffer->state.compute.trace_rays_active = true;
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genX(cmd_buffer_config_l3)(cmd_buffer, device->l3_config);
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genX(cmd_buffer_update_color_aux_op)(cmd_buffer, ANV_COLOR_AUX_OP_CLASS_NONE);
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@ -1269,6 +1255,70 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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genX(cmd_buffer_flush_push_descriptors)(cmd_buffer,
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&cmd_buffer->state.rt.base);
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#if GFX_VERx10 == 125
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/* Wa_14014427904 - We need additional invalidate/flush when
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* emitting NP state commands with ATS-M in compute mode.
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*/
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if (intel_device_info_is_atsm(device->info) &&
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cmd_buffer->queue_family->engine_class == INTEL_ENGINE_CLASS_COMPUTE) {
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genx_batch_emit_pipe_control(&cmd_buffer->batch,
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cmd_buffer->device->info,
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cmd_buffer->state.current_pipeline,
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ANV_PIPE_CS_STALL_BIT |
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ANV_PIPE_STATE_CACHE_INVALIDATE_BIT |
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ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT |
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ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT |
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ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT |
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ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT |
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ANV_PIPE_HDC_PIPELINE_FLUSH_BIT);
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}
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#endif
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anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_BTD), btd) {
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uint32_t dispatch_timeout_counter =
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cmd_buffer->device->physical->instance->dispatch_timeout_counter;
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uint32_t clamped_timeout_counter =
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genX(anv_get_btd_dispatch_timeout_counter)(dispatch_timeout_counter);
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#if GFX_VERx10 >= 200
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btd.DispatchTimeoutCounter = clamped_timeout_counter;
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#else
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btd.DispatchTimeoutCounter = clamped_timeout_counter & 0x3;
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btd.DispatchTimeoutCounterExtend = (clamped_timeout_counter >> 2) & 0x3;
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#endif
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/* BSpec 43851: "This field must be programmed to 6h i.e. memory backed
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* buffer must be 128KB."
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*/
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btd.PerDSSMemoryBackedBufferSize = 6;
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btd.MemoryBackedBufferBasePointer = (struct anv_address) { .bo = device->btd_fifo_bo };
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if (scratch_size > 0) {
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btd.ScratchSpaceBuffer = anv_shader_get_scratch_surf(&cmd_buffer->batch,
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cmd_buffer->device,
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MESA_SHADER_COMPUTE,
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scratch_size,
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false);
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}
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#if INTEL_NEEDS_WA_14017794102 || INTEL_NEEDS_WA_14023061436
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btd.BTDMidthreadpreemption = false;
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#endif
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#if GFX_VER >= 20
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/* TODO: We can tune this value specific to apps. */
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btd.ControlsthemaximumnumberofoutstandingRayQueriesperSS =
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RAYS_QUERIES_OUTSTANDING_1024;
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#endif
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#if GFX_VER >= 30
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btd.RTMemStructures64bModeEnable = true;
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btd.DynamicstackmanagementmechanismMISSPENALTY = MISS_PENALTY_16;
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btd.DynamicstackmanagementmechanismHITREWARD = HIT_REWARD_1;
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btd.DynamicstackmanagementmechanismSCALINGFACTOR = SCALING_FACTOR_4;
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btd.DynamicstackmanagementmechanismREDUCTIONCAP =
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get_stack_id_reduction_cap(cmd_buffer->device->physical->instance->stack_ids);
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#endif
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}
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genX(cmd_buffer_ensure_cfe_state)(cmd_buffer, scratch_size);
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/* Add these to the reloc list as they're internal buffers that don't
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* actually have relocs to pick them up manually.
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*
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@ -1278,6 +1328,37 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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rt->scratch.bo);
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anv_reloc_list_add_bo(cmd_buffer->batch.relocs,
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cmd_buffer->device->btd_fifo_bo);
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}
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void
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genX(cmd_buffer_flush_rt_state)(struct anv_cmd_buffer *cmd_buffer,
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unsigned scratch_size)
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{
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cmd_buffer_flush_rt_state(cmd_buffer, scratch_size);
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}
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static void
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cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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struct trace_params *params)
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{
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struct anv_device *device = cmd_buffer->device;
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if (INTEL_DEBUG(DEBUG_RT_NO_TRACE))
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return;
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if (anv_batch_has_error(&cmd_buffer->batch))
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return;
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/* If we have a known degenerate launch size, just bail */
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if (!params->is_launch_size_indirect &&
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(params->launch_size[0] == 0 ||
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params->launch_size[1] == 0 ||
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params->launch_size[2] == 0))
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return;
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trace_intel_begin_rays(&cmd_buffer->trace);
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cmd_buffer->state.compute.trace_rays_active = true;
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/* Allocate and set up our RT_DISPATCH_GLOBALS */
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struct anv_state rtdg_state =
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@ -1364,70 +1445,6 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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}
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}
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#if GFX_VERx10 == 125
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/* Wa_14014427904 - We need additional invalidate/flush when
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* emitting NP state commands with ATS-M in compute mode.
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*/
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if (intel_device_info_is_atsm(device->info) &&
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cmd_buffer->queue_family->engine_class == INTEL_ENGINE_CLASS_COMPUTE) {
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genx_batch_emit_pipe_control(&cmd_buffer->batch,
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cmd_buffer->device->info,
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cmd_buffer->state.current_pipeline,
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ANV_PIPE_CS_STALL_BIT |
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ANV_PIPE_STATE_CACHE_INVALIDATE_BIT |
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ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT |
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ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT |
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ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT |
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ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT |
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ANV_PIPE_HDC_PIPELINE_FLUSH_BIT);
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}
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#endif
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anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_BTD), btd) {
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uint32_t dispatch_timeout_counter =
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cmd_buffer->device->physical->instance->dispatch_timeout_counter;
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uint32_t clamped_timeout_counter =
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genX(anv_get_btd_dispatch_timeout_counter)(dispatch_timeout_counter);
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#if GFX_VERx10 >= 200
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btd.DispatchTimeoutCounter = clamped_timeout_counter;
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#else
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btd.DispatchTimeoutCounter = clamped_timeout_counter & 0x3;
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btd.DispatchTimeoutCounterExtend = (clamped_timeout_counter >> 2) & 0x3;
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#endif
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/* BSpec 43851: "This field must be programmed to 6h i.e. memory backed
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* buffer must be 128KB."
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*/
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btd.PerDSSMemoryBackedBufferSize = 6;
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btd.MemoryBackedBufferBasePointer = (struct anv_address) { .bo = device->btd_fifo_bo };
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if (rt->scratch_size > 0) {
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btd.ScratchSpaceBuffer = anv_shader_get_scratch_surf(&cmd_buffer->batch,
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cmd_buffer->device,
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MESA_SHADER_COMPUTE,
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rt->scratch_size,
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false);;
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}
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#if INTEL_NEEDS_WA_14017794102 || INTEL_NEEDS_WA_14023061436
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btd.BTDMidthreadpreemption = false;
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#endif
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#if GFX_VER >= 20
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/* TODO: We can tune this value specific to apps. */
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btd.ControlsthemaximumnumberofoutstandingRayQueriesperSS =
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RAYS_QUERIES_OUTSTANDING_1024;
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#endif
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#if GFX_VER >= 30
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btd.RTMemStructures64bModeEnable = true;
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btd.DynamicstackmanagementmechanismMISSPENALTY = MISS_PENALTY_16;
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btd.DynamicstackmanagementmechanismHITREWARD = HIT_REWARD_1;
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btd.DynamicstackmanagementmechanismSCALINGFACTOR = SCALING_FACTOR_4;
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btd.DynamicstackmanagementmechanismREDUCTIONCAP =
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get_stack_id_reduction_cap(cmd_buffer->device->physical->instance->stack_ids);
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#endif
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}
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genX(cmd_buffer_ensure_cfe_state)(cmd_buffer, rt->scratch_size);
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const struct brw_cs_prog_data *cs_prog_data =
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brw_cs_prog_data_const(device->rt_trampoline->prog_data);
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struct intel_cs_dispatch_info dispatch =
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@ -1538,6 +1555,7 @@ genX(CmdTraceRaysKHR)(
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},
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};
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cmd_buffer_flush_rt_state(cmd_buffer, cmd_buffer->state.rt.scratch_size);
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cmd_buffer_trace_rays(cmd_buffer, ¶ms);
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}
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@ -1561,6 +1579,7 @@ genX(CmdTraceRaysIndirectKHR)(
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.launch_size_addr = indirectDeviceAddress,
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};
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cmd_buffer_flush_rt_state(cmd_buffer, cmd_buffer->state.rt.scratch_size);
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cmd_buffer_trace_rays(cmd_buffer, ¶ms);
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}
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@ -1578,6 +1597,7 @@ genX(CmdTraceRaysIndirect2KHR)(
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offsetof(VkTraceRaysIndirectCommand2KHR, width),
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};
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cmd_buffer_flush_rt_state(cmd_buffer, cmd_buffer->state.rt.scratch_size);
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cmd_buffer_trace_rays(cmd_buffer, ¶ms);
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}
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