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r600: fix tfp1 bo size

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Setting the wrong bo size resulting in an incomplete
read cache flush when reading the texture.  This fixes the
compiz text corruption.

[agd5f: take hw pitch alignment into account]
This commit is contained in:
Andre Maasikas 2009-10-15 11:24:49 -04:00 • committed by Alex Deucher
parent a3fec14101
commit 22a0029a68
1 changed files with 6 additions and 2 deletions
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8
src/mesa/drivers/dri/r600/r600_texstate.c
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@ -721,7 +721,9 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
struct gl_texture_object *tObj =
_mesa_lookup_texture(rmesa->radeon.glCtx, texname);
radeonTexObjPtr t = radeon_tex_obj(tObj);
uint32_t pitch_val, size;
int firstlevel = t->mt ? t->mt->firstLevel : 0;
const struct gl_texture_image *firstImage;
uint32_t pitch_val, size, row_align;
if (!tObj)
return;
@ -731,7 +733,9 @@ void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
if (!offset)
return;
size = pitch;//h * w * (depth / 8);
firstImage = t->base.Image[0][firstlevel];
row_align = rmesa->radeon.texture_row_align - 1;
size = ((firstImage->Width * (depth / 8) + row_align) & ~row_align) * firstImage->Height;
if (t->bo) {
radeon_bo_unref(t->bo);
t->bo = NULL;