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radeonsi: unduplicate code setting MIN_COMPRESSED_BLOCK_SIZE

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7721>
This commit is contained in:
Marek Olšák 2020-11-24 04:49:59 -05:00
parent 2c61411f25
commit 22917baa75
1 changed files with 8 additions and 17 deletions
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25
src/gallium/drivers/radeonsi/si_state.c
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@ -2318,16 +2318,15 @@ static void si_initialize_color_surface(struct si_context *sctx, struct si_surfa
}
}
/* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
* 64 for APU because all of our APUs to date use DIMMs which have
* a request granularity size of 64B while all other chips have a
* 32B request size */
unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
if (!sctx->screen->info.has_dedicated_vram)
min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_64B;
if (sctx->chip_class >= GFX10) {
unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
/* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
64 for APU because all of our APUs to date use DIMMs which have
a request granularity size of 64B while all other chips have a
32B request size */
if (!sctx->screen->info.has_dedicated_vram)
min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_64B;
surf->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(V_028C78_MAX_BLOCK_SIZE_256B) |
S_028C78_MAX_COMPRESSED_BLOCK_SIZE(tex->surface.u.gfx9.dcc.max_compressed_block_size) |
S_028C78_MIN_COMPRESSED_BLOCK_SIZE(min_compressed_block_size) |
@ -2335,14 +2334,6 @@ static void si_initialize_color_surface(struct si_context *sctx, struct si_surfa
S_028C78_INDEPENDENT_128B_BLOCKS(tex->surface.u.gfx9.dcc.independent_128B_blocks);
} else if (sctx->chip_class >= GFX8) {
unsigned max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_256B;
unsigned min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_32B;
/* amdvlk: [min-compressed-block-size] should be set to 32 for dGPU and
64 for APU because all of our APUs to date use DIMMs which have
a request granularity size of 64B while all other chips have a
32B request size */
if (!sctx->screen->info.has_dedicated_vram)
min_compressed_block_size = V_028C78_MIN_BLOCK_SIZE_64B;
if (tex->buffer.b.b.nr_storage_samples > 1) {
if (tex->surface.bpe == 1)