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nv50/ir: refine limitation on load/store loading offsets, include atomics

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Note that shared memory loads can actually do offsets. The restrictions
vary by generation, this will be added in a later change.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10164>
This commit is contained in:
Ilia Mirkin 2021-04-12 18:15:04 -04:00 • committed by Marge Bot
parent c95d2a86d3
commit 21f9b1cbe7
1 changed files with 5 additions and 4 deletions
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9
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
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@ -402,11 +402,12 @@ TargetNV50::insnCanLoadOffset(const Instruction *i, int s, int offset) const
if (!i->src(s).isIndirect(0))
return true;
offset += i->src(s).get()->reg.data.offset;
if (i->op == OP_LOAD || i->op == OP_STORE) {
if (i->op == OP_LOAD || i->op == OP_STORE || i->op == OP_ATOM) {
// There are some restrictions in theory, but in practice they're never
// going to be hit. When we enable shared/global memory, this will
// become more important.
return true;
// going to be hit. However offsets on global/shared memory are just
// plain not supported.
return i->src(s).getFile() != FILE_MEMORY_GLOBAL &&
i->src(s).getFile() != FILE_MEMORY_SHARED;
}
return offset >= 0 && offset <= (int32_t)(127 * i->src(s).get()->reg.size);
}