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anv: ignore descriptor alignment for inline uniforms

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For this particular case only it doesn't matter. Fixes some new CTS
tests with small inline uniform sizes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28040>
This commit is contained in:
Lionel Landwerlin 2024-03-07 13:18:46 +02:00 • committed by Marge Bot
parent 812be09cd2
commit 20df1d2b1f
1 changed files with 10 additions and 2 deletions
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12
src/intel/vulkan/anv_nir_apply_pipeline_layout.c
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@ -621,8 +621,16 @@ build_res_index(nir_builder *b,
}
const uint32_t desc_bti = state->set[set].binding[binding].surface_offset;
assert(bind_layout->descriptor_surface_stride % 8 == 0);
const uint32_t desc_stride = bind_layout->descriptor_surface_stride / 8;
/* We don't care about the stride field for inline uniforms (see
* build_desc_addr_for_res_index), but for anything else we should be
* aligned to 8 bytes because we store a multiple of 8 in the packed info
* to be able to encode a stride up to 2040 (8 * 255).
*/
assert(bind_layout->type == VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK ||
bind_layout->descriptor_surface_stride % 8 == 0);
const uint32_t desc_stride =
bind_layout->type == VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK ? 0 :
bind_layout->descriptor_surface_stride / 8;
nir_def *packed =
nir_ior_imm(b,