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ac: add has_tc_compat_zrange_bug to ac_gpu_info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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parent
b55919cf2a
commit
20c5db02b5
6 changed files with 7 additions and 6 deletions
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@ -470,6 +470,9 @@ bool ac_query_gpu_info(int fd, void *dev_p,
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info->has_gfx9_scissor_bug = info->family == CHIP_VEGA10 ||
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info->family == CHIP_RAVEN;
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info->has_tc_compat_zrange_bug = info->chip_class >= GFX8 &&
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info->chip_class <= GFX9;
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/* Get the number of good compute units. */
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info->num_good_compute_units = 0;
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for (i = 0; i < info->max_se; i++)
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@ -159,6 +159,7 @@ struct radeon_info {
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/* Hardware bugs. */
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bool has_gfx9_scissor_bug;
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bool has_tc_compat_zrange_bug;
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};
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bool ac_query_gpu_info(int fd, void *dev_p,
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@ -1403,7 +1403,7 @@ radv_update_zrange_precision(struct radv_cmd_buffer *cmd_buffer,
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uint32_t db_z_info = ds->db_z_info;
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uint32_t db_z_info_reg;
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if (!cmd_buffer->device->physical_device->has_tc_compat_zrange_bug ||
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if (!cmd_buffer->device->physical_device->rad_info.has_tc_compat_zrange_bug ||
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!radv_image_is_tc_compat_htile(image))
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return;
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@ -1632,7 +1632,7 @@ radv_set_tc_compat_zrange_metadata(struct radv_cmd_buffer *cmd_buffer,
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{
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struct radeon_cmdbuf *cs = cmd_buffer->cs;
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if (!cmd_buffer->device->physical_device->has_tc_compat_zrange_bug)
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if (!cmd_buffer->device->physical_device->rad_info.has_tc_compat_zrange_bug)
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return;
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uint64_t va = radv_get_tc_compat_zrange_va(image, range->baseMipLevel);
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@ -363,8 +363,6 @@ radv_physical_device_init(struct radv_physical_device *device,
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device->rad_info.family == CHIP_RENOIR;
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}
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device->has_tc_compat_zrange_bug = device->rad_info.chip_class < GFX10;
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device->out_of_order_rast_allowed = device->rad_info.has_out_of_order_rast &&
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!(device->instance->debug_flags & RADV_DEBUG_NO_OUT_OF_ORDER);
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@ -1159,7 +1159,7 @@ radv_image_alloc_htile(struct radv_device *device, struct radv_image *image)
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image->clear_value_offset = image->htile_offset + image->planes[0].surface.htile_size;
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image->size = image->clear_value_offset + image->info.levels * 8;
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if (radv_image_is_tc_compat_htile(image) &&
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device->physical_device->has_tc_compat_zrange_bug) {
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device->physical_device->rad_info.has_tc_compat_zrange_bug) {
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/* Metadata for the TC-compatible HTILE hardware bug which
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* have to be fixed by updating ZRANGE_PRECISION when doing
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* fast depth clears to 0.0f.
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@ -281,7 +281,6 @@ struct radv_physical_device {
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struct wsi_device wsi_device;
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bool rbplus_allowed; /* if RB+ is allowed */
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bool has_tc_compat_zrange_bug;
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bool out_of_order_rast_allowed;
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