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i965/vec4: Add support for untyped surface message sends from GRF.

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This doesn't actually enable untyped surface message sends from GRF
yet, the upcoming atomic counter and image intrinsic lowering code
will.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Francisco Jerez 2015-02-26 17:42:47 +02:00
parent 8865fe309d
commit 20915130ac
3 changed files with 14 additions and 16 deletions
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7
src/mesa/drivers/dri/i965/brw_vec4.cpp
View file

@ -214,6 +214,8 @@ vec4_instruction::is_send_from_grf()
switch (opcode) {
case SHADER_OPCODE_SHADER_TIME_ADD:
case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
return true;
default:
return false;
@ -228,6 +230,8 @@ vec4_instruction::regs_read(unsigned arg) const
switch (opcode) {
case SHADER_OPCODE_SHADER_TIME_ADD:
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
return arg == 0 ? mlen : 1;
case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
@ -305,9 +309,6 @@ vec4_visitor::implied_mrf_writes(vec4_instruction *inst)
case SHADER_OPCODE_TG4:
case SHADER_OPCODE_TG4_OFFSET:
return inst->header_present ? 1 : 0;
case SHADER_OPCODE_UNTYPED_ATOMIC:
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
return 0;
default:
unreachable("not reached");
}

16
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
View file

@ -1469,19 +1469,17 @@ vec4_generator::generate_code(const cfg_t *cfg)
break;
case SHADER_OPCODE_UNTYPED_ATOMIC:
assert(src[0].file == BRW_IMMEDIATE_VALUE &&
src[1].file == BRW_IMMEDIATE_VALUE);
brw_untyped_atomic(p, dst, brw_message_reg(inst->base_mrf),
src[1], src[0].dw1.ud, inst->mlen,
assert(src[1].file == BRW_IMMEDIATE_VALUE &&
src[2].file == BRW_IMMEDIATE_VALUE);
brw_untyped_atomic(p, dst, src[0], src[2], src[1].dw1.ud, inst->mlen,
!inst->dst.is_null());
brw_mark_surface_used(&prog_data->base, src[1].dw1.ud);
brw_mark_surface_used(&prog_data->base, src[2].dw1.ud);
break;
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
assert(src[0].file == BRW_IMMEDIATE_VALUE);
brw_untyped_surface_read(p, dst, brw_message_reg(inst->base_mrf),
src[0], inst->mlen, 1);
brw_mark_surface_used(&prog_data->base, src[0].dw1.ud);
assert(src[1].file == BRW_IMMEDIATE_VALUE);
brw_untyped_surface_read(p, dst, src[0], src[1], inst->mlen, 1);
brw_mark_surface_used(&prog_data->base, src[1].dw1.ud);
break;
case VS_OPCODE_UNPACK_FLAGS_SIMD4X2:

7
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
View file

@ -2961,8 +2961,8 @@ vec4_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
* unused channels will be masked out.
*/
vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst,
brw_message_reg(0),
src_reg(atomic_op), src_reg(surf_index));
inst->base_mrf = 0;
inst->mlen = mlen;
}
@ -2977,9 +2977,8 @@ vec4_visitor::emit_untyped_surface_read(unsigned surf_index, dst_reg dst,
* untyped surface read message, but that's OK because unused
* channels will be masked out.
*/
vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ,
dst, src_reg(surf_index));
inst->base_mrf = 0;
vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ, dst,
brw_message_reg(0), src_reg(surf_index));
inst->mlen = 1;
}