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radeon/llvm: Expand fsub during ISel

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This commit is contained in:
Tom Stellard 2012-05-17 13:13:17 -04:00
parent 9916f2d2af
commit 1fe70c6ae1
2 changed files with 2 additions and 11 deletions
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2
src/gallium/drivers/radeon/R600ISelLowering.cpp
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@ -34,6 +34,8 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Legal);
setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Legal);
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Legal);
setOperationAction(ISD::FSUB, MVT::f32, Expand);
}
MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(

11
src/gallium/drivers/radeon/R600LowerInstructions.cpp
View file

@ -303,17 +303,6 @@ bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF)
break;
}
case AMDIL::SUB_f32:
{
MI.getOperand(2).addTargetFlag(MO_FLAG_NEG);
BuildMI(MBB, I, MBB.findDebugLoc(I),
TII->get(TII->getISAOpcode(AMDIL::ADD)))
.addOperand(MI.getOperand(0))
.addOperand(MI.getOperand(1))
.addOperand(MI.getOperand(2));
break;
}
case AMDIL::ULT:
BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::SETGT_UINT))
.addOperand(MI.getOperand(0))