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i965: Add support for gl_FrontFacing on gen6.

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Fixes glsl1-gl_FrontFacing var (2) with new FS.
This commit is contained in:
Eric Anholt 2010-10-06 11:19:48 -07:00
parent a760b5b509
commit 1fdc8c007e
1 changed files with 39 additions and 10 deletions
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49
src/mesa/drivers/dri/i965/brw_fs.cpp
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@ -830,16 +830,33 @@ fs_reg *
fs_visitor::emit_frontfacing_interpolation(ir_variable *ir)
{
fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
/* bit 31 is "primitive is back face", so checking < (1 << 31) gives
* us front face
*/
fs_inst *inst = emit(fs_inst(BRW_OPCODE_CMP,
*reg,
fs_reg(r1_6ud),
fs_reg(1u << 31)));
inst->conditional_mod = BRW_CONDITIONAL_L;
emit(fs_inst(BRW_OPCODE_AND, *reg, *reg, fs_reg(1u)));
/* The frontfacing comes in as a bit in the thread payload. */
if (intel->gen >= 6) {
emit(fs_inst(BRW_OPCODE_ASR,
*reg,
fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_D)),
fs_reg(15)));
emit(fs_inst(BRW_OPCODE_NOT,
*reg,
*reg));
emit(fs_inst(BRW_OPCODE_AND,
*reg,
*reg,
fs_reg(1)));
} else {
fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
/* bit 31 is "primitive is back face", so checking < (1 << 31) gives
* us front face
*/
fs_inst *inst = emit(fs_inst(BRW_OPCODE_CMP,
*reg,
fs_reg(r1_6ud),
fs_reg(1u << 31)));
inst->conditional_mod = BRW_CONDITIONAL_L;
emit(fs_inst(BRW_OPCODE_AND, *reg, *reg, fs_reg(1u)));
}
return reg;
}
@ -2818,6 +2835,18 @@ fs_visitor::generate_code()
case BRW_OPCODE_XOR:
brw_XOR(p, dst, src[0], src[1]);
break;
case BRW_OPCODE_NOT:
brw_NOT(p, dst, src[0]);
break;
case BRW_OPCODE_ASR:
brw_ASR(p, dst, src[0], src[1]);
break;
case BRW_OPCODE_SHR:
brw_SHR(p, dst, src[0], src[1]);
break;
case BRW_OPCODE_SHL:
brw_SHL(p, dst, src[0], src[1]);
break;
case BRW_OPCODE_CMP:
brw_CMP(p, dst, inst->conditional_mod, src[0], src[1]);