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radeonsi/vcn: Reduce allocated size for pre-encode recon pics
We use 4x downscale for pre-encode, so we don't need full size pre-encode reconstructed pictures. Cc: mesa-stable Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38303>
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1 changed files with 25 additions and 10 deletions
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@ -1299,7 +1299,7 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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uint32_t aligned_width = align(enc->base.width, rec_alignment);
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uint32_t aligned_height = align(enc->base.height, rec_alignment);
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uint32_t pitch = align(aligned_width, enc->alignment);
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uint32_t luma_size, chroma_size, offset;
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uint32_t luma_size, chroma_size, pre_luma_size, pre_chroma_size, offset;
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struct radeon_enc_pic *enc_pic = &enc->enc_pic;
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int i;
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bool has_b = enc_pic->spec_misc.b_picture_enabled; /* for h264 only */
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@ -1309,9 +1309,21 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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luma_size = align(pitch * aligned_dpb_height , enc->alignment);
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chroma_size = align(luma_size / 2 , enc->alignment);
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if (enc_pic->quality_modes.pre_encode_mode) {
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uint32_t scale = enc_pic->quality_modes.pre_encode_mode;
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uint32_t pre_pitch = align(aligned_width / scale, enc->alignment);
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uint32_t pre_aligned_height = align(aligned_height / scale, enc->alignment);
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pre_luma_size = align(pre_pitch * MAX2(256, pre_aligned_height), enc->alignment);
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pre_chroma_size = align(pre_luma_size / 2, enc->alignment);
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}
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if (enc_pic->bit_depth_luma_minus8 || enc_pic->bit_depth_chroma_minus8) {
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luma_size *= 2;
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chroma_size *= 2;
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pre_luma_size *= 2;
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pre_chroma_size *= 2;
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}
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assert(num_reconstructed_pictures <= RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES);
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@ -1339,11 +1351,11 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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if (enc_pic->quality_modes.pre_encode_mode) {
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.red_offset = offset;
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offset += luma_size;
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offset += pre_luma_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.green_offset = offset;
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offset += luma_size;
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offset += pre_luma_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.blue_offset = offset;
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offset += luma_size;
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offset += pre_luma_size;
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}
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if (is_av1) {
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@ -1357,7 +1369,7 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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if (enc_pic->quality_modes.pre_encode_mode)
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radeon_enc_rec_offset(&enc_pic->ctx_buf.pre_encode_reconstructed_pictures[i],
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&offset, luma_size, chroma_size, is_av1);
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&offset, pre_luma_size, pre_chroma_size, is_av1);
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}
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for (; i < RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES; i++) {
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@ -1381,11 +1393,11 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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if (enc_pic->quality_modes.pre_encode_mode) {
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.red_offset = offset;
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offset += luma_size;
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offset += pre_luma_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.green_offset = offset;
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offset += luma_size;
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offset += pre_luma_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.blue_offset = offset;
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offset += luma_size;
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offset += pre_luma_size;
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}
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for (i = 0; i < num_reconstructed_pictures; i++) {
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@ -1394,7 +1406,7 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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if (enc_pic->quality_modes.pre_encode_mode)
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radeon_enc_rec_offset(&enc_pic->ctx_buf.pre_encode_reconstructed_pictures[i],
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&offset, luma_size, chroma_size, false);
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&offset, pre_luma_size, pre_chroma_size, false);
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}
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for (; i < RENCODE_MAX_NUM_RECONSTRUCTED_PICTURES; i++) {
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@ -2083,7 +2095,10 @@ void radeon_enc_create_dpb_aux_buffers(struct radeon_encoder *enc, struct radeon
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}
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if (enc->enc_pic.quality_modes.pre_encode_mode) {
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buf->pre = enc->base.context->create_video_buffer(enc->base.context, &buf->templ);
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struct pipe_video_buffer templ = buf->templ;
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templ.width /= enc->enc_pic.quality_modes.pre_encode_mode;
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templ.height /= enc->enc_pic.quality_modes.pre_encode_mode;
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buf->pre = enc->base.context->create_video_buffer(enc->base.context, &templ);
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if (!buf->pre) {
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RADEON_ENC_ERR("Can't create preenc buffer!\n");
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return;
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