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synced 2026-01-06 06:40:08 +01:00
radeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2
v2: - Drop dependency on LLVM >= 3.5.1 - Rename si_create_shader() to si_shader_binary_read()
This commit is contained in:
Tom Stellard
parent
fa07f4b68a
commit
1f4e48d5b5
4 changed files with 127 additions and 59 deletions
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@ -23,14 +23,15 @@
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*/
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#include "util/u_memory.h"
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#include "radeon/r600_pipe_common.h"
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#include "radeon/radeon_elf_util.h"
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#include "radeon/radeon_llvm_util.h"
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#include "radeon/r600_cs.h"
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#include "si_pipe.h"
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#include "si_shader.h"
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#include "sid.h"
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#include "radeon/radeon_llvm_util.h"
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#define MAX_GLOBAL_BUFFERS 20
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#if HAVE_LLVM < 0x0305
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#define NUM_USER_SGPRS 2
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@ -44,14 +45,18 @@ struct si_compute {
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unsigned local_size;
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unsigned private_size;
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unsigned input_size;
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unsigned num_kernels;
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struct si_shader *kernels;
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struct radeon_shader_binary binary;
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struct si_shader program;
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unsigned num_user_sgprs;
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struct r600_resource *input_buffer;
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struct pipe_resource *global_buffers[MAX_GLOBAL_BUFFERS];
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#if HAVE_LLVM < 0x0306
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unsigned num_kernels;
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struct si_shader *kernels;
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LLVMContextRef llvm_ctx;
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#endif
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};
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static void *si_create_compute_state(
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@ -61,10 +66,7 @@ static void *si_create_compute_state(
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struct si_context *sctx = (struct si_context *)ctx;
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struct si_compute *program = CALLOC_STRUCT(si_compute);
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const struct pipe_llvm_program_header *header;
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const unsigned char *code;
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unsigned i;
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program->llvm_ctx = LLVMContextCreate();
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const char *code;
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header = cso->prog;
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code = cso->prog + sizeof(struct pipe_llvm_program_header);
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@ -74,17 +76,27 @@ static void *si_create_compute_state(
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program->private_size = cso->req_private_mem;
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program->input_size = cso->req_input_mem;
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program->num_kernels = radeon_llvm_get_num_kernels(program->llvm_ctx, code,
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header->num_bytes);
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program->kernels = CALLOC(sizeof(struct si_shader),
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program->num_kernels);
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for (i = 0; i < program->num_kernels; i++) {
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LLVMModuleRef mod = radeon_llvm_get_kernel_module(program->llvm_ctx, i,
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code, header->num_bytes);
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si_compile_llvm(sctx->screen, &program->kernels[i], mod);
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LLVMDisposeModule(mod);
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#if HAVE_LLVM < 0x0306
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{
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unsigned i;
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program->llvm_ctx = LLVMContextCreate();
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program->num_kernels = radeon_llvm_get_num_kernels(program->llvm_ctx,
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code, header->num_bytes);
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program->kernels = CALLOC(sizeof(struct si_shader),
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program->num_kernels);
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for (i = 0; i < program->num_kernels; i++) {
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LLVMModuleRef mod = radeon_llvm_get_kernel_module(program->llvm_ctx, i,
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code, header->num_bytes);
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si_compile_llvm(sctx->screen, &program->kernels[i], mod);
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LLVMDisposeModule(mod);
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}
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}
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#else
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radeon_elf_read(code, header->num_bytes, &program->binary, true);
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si_shader_binary_read(sctx->screen, &program->program, &program->binary);
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#endif
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program->input_buffer = si_resource_create_custom(sctx->b.b.screen,
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PIPE_USAGE_IMMUTABLE, program->input_size);
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@ -181,10 +193,15 @@ static void si_launch_grid(
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uint64_t shader_va;
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unsigned arg_user_sgpr_count = NUM_USER_SGPRS;
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unsigned i;
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struct si_shader *shader = &program->kernels[pc];
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struct si_shader *shader = &program->program;
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unsigned lds_blocks;
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unsigned num_waves_for_scratch;
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#if HAVE_LLVM < 0x0306
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shader = &program->kernels[pc];
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#endif
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radeon_emit(cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0) | PKT3_SHADER_TYPE_S(1));
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radeon_emit(cs, 0x80000000);
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radeon_emit(cs, 0x80000000);
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@ -198,6 +215,11 @@ static void si_launch_grid(
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pm4->compute_pkt = true;
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#if HAVE_LLVM >= 0x0306
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/* Read the config information */
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si_shader_binary_read_config(&program->binary, &program->program, pc);
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#endif
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/* Upload the kernel arguments */
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/* The extra num_work_size_bytes are for work group / work item size information */
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@ -290,6 +312,10 @@ static void si_launch_grid(
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}
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shader_va = shader->bo->gpu_address;
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#if HAVE_LLVM >= 0x0306
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shader_va += pc;
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#endif
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si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_DATA);
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si_pm4_set_reg(pm4, R_00B830_COMPUTE_PGM_LO, (shader_va >> 8) & 0xffffffff);
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si_pm4_set_reg(pm4, R_00B834_COMPUTE_PGM_HI, shader_va >> 40);
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@ -388,6 +414,7 @@ static void si_delete_compute_state(struct pipe_context *ctx, void* state){
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return;
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}
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#if HAVE_LLVM < 0x0306
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if (program->kernels) {
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for (int i = 0; i < program->num_kernels; i++){
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if (program->kernels[i].bo){
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@ -400,10 +427,16 @@ static void si_delete_compute_state(struct pipe_context *ctx, void* state){
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if (program->llvm_ctx){
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LLVMContextDispose(program->llvm_ctx);
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}
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#else
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si_shader_destroy(ctx, &program->program);
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#endif
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pipe_resource_reference(
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(struct pipe_resource **)&program->input_buffer, NULL);
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//And then free the program itself.
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FREE(program->binary.code);
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FREE(program->binary.config);
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FREE(program->binary.rodata);
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FREE(program);
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}
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@ -336,7 +336,11 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
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case PIPE_SHADER_COMPUTE:
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switch (param) {
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case PIPE_SHADER_CAP_PREFERRED_IR:
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#if HAVE_LLVM < 0x0306
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return PIPE_SHADER_IR_LLVM;
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#else
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return PIPE_SHADER_IR_NATIVE;
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#endif
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case PIPE_SHADER_CAP_DOUBLES:
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return 0; /* XXX: Enable doubles once the compiler can
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handle them. */
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@ -33,6 +33,7 @@
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#include "gallivm/lp_bld_arit.h"
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#include "gallivm/lp_bld_flow.h"
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#include "radeon/radeon_llvm.h"
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#include "radeon/radeon_elf_util.h"
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#include "radeon/radeon_llvm_emit.h"
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#include "util/u_memory.h"
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#include "tgsi/tgsi_parse.h"
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@ -2500,52 +2501,34 @@ static void preload_ring_buffers(struct si_shader_context *si_shader_ctx)
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}
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}
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int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
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LLVMModuleRef mod)
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void si_shader_binary_read_config(const struct radeon_shader_binary *binary,
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struct si_shader *shader,
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unsigned symbol_offset)
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{
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unsigned r; /* llvm_compile result */
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unsigned i;
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unsigned char *ptr;
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struct radeon_shader_binary binary;
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bool dump = r600_can_dump_shader(&sscreen->b,
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shader->selector ? shader->selector->tokens : NULL);
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const char * gpu_family = r600_get_llvm_processor_name(sscreen->b.family);
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unsigned code_size;
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/* Use LLVM to compile shader */
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memset(&binary, 0, sizeof(binary));
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r = radeon_llvm_compile(mod, &binary, gpu_family, dump);
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/* Output binary dump if rscreen->debug_flags are set */
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if (dump && ! binary.disassembled) {
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fprintf(stderr, "SI CODE:\n");
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for (i = 0; i < binary.code_size; i+=4 ) {
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fprintf(stderr, "%02x%02x%02x%02x\n", binary.code[i + 3],
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binary.code[i + 2], binary.code[i + 1],
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binary.code[i]);
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}
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}
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const unsigned char *config =
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radeon_shader_binary_config_start(binary, symbol_offset);
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/* XXX: We may be able to emit some of these values directly rather than
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* extracting fields to be emitted later.
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*/
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/* Parse config data in compiled binary */
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for (i = 0; i < binary.config_size; i+= 8) {
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unsigned reg = util_le32_to_cpu(*(uint32_t*)(binary.config + i));
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unsigned value = util_le32_to_cpu(*(uint32_t*)(binary.config + i + 4));
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for (i = 0; i < binary->config_size_per_symbol; i+= 8) {
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unsigned reg = util_le32_to_cpu(*(uint32_t*)(config + i));
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unsigned value = util_le32_to_cpu(*(uint32_t*)(config + i + 4));
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switch (reg) {
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case R_00B028_SPI_SHADER_PGM_RSRC1_PS:
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case R_00B128_SPI_SHADER_PGM_RSRC1_VS:
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case R_00B228_SPI_SHADER_PGM_RSRC1_GS:
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case R_00B848_COMPUTE_PGM_RSRC1:
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shader->num_sgprs = (G_00B028_SGPRS(value) + 1) * 8;
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shader->num_vgprs = (G_00B028_VGPRS(value) + 1) * 4;
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shader->num_sgprs = MAX2(shader->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8);
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shader->num_vgprs = MAX2(shader->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4);
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break;
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case R_00B02C_SPI_SHADER_PGM_RSRC2_PS:
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shader->lds_size = G_00B02C_EXTRA_LDS_SIZE(value);
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shader->lds_size = MAX2(shader->lds_size, G_00B02C_EXTRA_LDS_SIZE(value));
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break;
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case R_00B84C_COMPUTE_PGM_RSRC2:
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shader->lds_size = G_00B84C_LDS_SIZE(value);
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shader->lds_size = MAX2(shader->lds_size, G_00B84C_LDS_SIZE(value));
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break;
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case R_0286CC_SPI_PS_INPUT_ENA:
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shader->spi_ps_input_ena = value;
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@ -2561,9 +2544,32 @@ int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
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break;
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}
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}
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}
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int si_shader_binary_read(struct si_screen *sscreen,
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struct si_shader *shader,
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const struct radeon_shader_binary *binary)
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{
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unsigned i;
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unsigned code_size;
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unsigned char *ptr;
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bool dump = r600_can_dump_shader(&sscreen->b,
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shader->selector ? shader->selector->tokens : NULL);
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if (dump && !binary->disassembled) {
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fprintf(stderr, "SI CODE:\n");
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for (i = 0; i < binary->code_size; i+=4 ) {
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fprintf(stderr, "@0x%x: %02x%02x%02x%02x\n", i, binary->code[i + 3],
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binary->code[i + 2], binary->code[i + 1],
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binary->code[i]);
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}
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}
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si_shader_binary_read_config(binary, shader, 0);
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/* copy new shader */
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code_size = binary.code_size + binary.rodata_size;
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code_size = binary->code_size + binary->rodata_size;
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r600_resource_reference(&shader->bo, NULL);
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shader->bo = si_resource_create_custom(&sscreen->b.b, PIPE_USAGE_IMMUTABLE,
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code_size);
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@ -2571,19 +2577,37 @@ int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
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return -ENOMEM;
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}
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ptr = sscreen->b.ws->buffer_map(shader->bo->cs_buf, NULL, PIPE_TRANSFER_WRITE);
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util_memcpy_cpu_to_le32(ptr, binary.code, binary.code_size);
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if (binary.rodata_size > 0) {
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ptr += binary.code_size;
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util_memcpy_cpu_to_le32(ptr, binary.rodata, binary.rodata_size);
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ptr = sscreen->b.ws->buffer_map(shader->bo->cs_buf, NULL, PIPE_TRANSFER_READ_WRITE);
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util_memcpy_cpu_to_le32(ptr, binary->code, binary->code_size);
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if (binary->rodata_size > 0) {
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ptr += binary->code_size;
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util_memcpy_cpu_to_le32(ptr, binary->rodata, binary->rodata_size);
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}
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sscreen->b.ws->buffer_unmap(shader->bo->cs_buf);
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free(binary.code);
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free(binary.config);
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free(binary.rodata);
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return 0;
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}
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int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
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LLVMModuleRef mod)
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{
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int r = 0;
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struct radeon_shader_binary binary;
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bool dump = r600_can_dump_shader(&sscreen->b,
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shader->selector ? shader->selector->tokens : NULL);
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memset(&binary, 0, sizeof(binary));
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r = radeon_llvm_compile(mod, &binary,
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r600_get_llvm_processor_name(sscreen->b.family), dump);
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if (r) {
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return r;
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}
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r = si_shader_binary_read(sscreen, shader, &binary);
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FREE(binary.code);
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FREE(binary.config);
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FREE(binary.rodata);
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return r;
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}
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@ -33,6 +33,8 @@
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#include "tgsi/tgsi_scan.h"
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#include "si_state.h"
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struct radeon_shader_binary;
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#define SI_SGPR_RW_BUFFERS 0 /* rings (& stream-out, VS only) */
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#define SI_SGPR_CONST 2
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#define SI_SGPR_SAMPLER 4
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@ -180,5 +182,10 @@ int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
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LLVMModuleRef mod);
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void si_shader_destroy(struct pipe_context *ctx, struct si_shader *shader);
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unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
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int si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader,
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const struct radeon_shader_binary *binary);
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void si_shader_binary_read_config(const struct radeon_shader_binary *binary,
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struct si_shader *shader,
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unsigned symbol_offset);
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#endif
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