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freedreno/ir3: pass ctx instead of block to create_collect()
Prep work for following patch. Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark
parent
bd2ca2bcdd
commit
1f45320e51
1 changed files with 19 additions and 18 deletions
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@ -649,9 +649,10 @@ create_uniform_indirect(struct ir3_context *ctx, int n,
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}
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static struct ir3_instruction *
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create_collect(struct ir3_block *block, struct ir3_instruction *const *arr,
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create_collect(struct ir3_context *ctx, struct ir3_instruction *const *arr,
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unsigned arrsz)
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{
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struct ir3_block *block = ctx->block;
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struct ir3_instruction *collect;
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if (arrsz == 0)
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@ -1272,7 +1273,7 @@ emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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carry->cat2.condition = IR3_COND_LT;
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base_hi = ir3_ADD_S(b, base_hi, 0, carry, 0);
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addr = create_collect(b, (struct ir3_instruction*[]){ addr, base_hi }, 2);
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addr = create_collect(ctx, (struct ir3_instruction*[]){ addr, base_hi }, 2);
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}
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for (int i = 0; i < intr->num_components; i++) {
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@ -1300,7 +1301,7 @@ emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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offset = get_src(ctx, &intr->src[1])[0];
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/* src0 is uvec2(offset*4, 0), src1 is offset.. nir already *= 4: */
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src0 = create_collect(b, (struct ir3_instruction*[]){
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src0 = create_collect(ctx, (struct ir3_instruction*[]){
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offset,
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create_immed(b, 0),
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}, 2);
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@ -1341,9 +1342,9 @@ emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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/* src0 is value, src1 is offset, src2 is uvec2(offset*4, 0)..
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* nir already *= 4:
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*/
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src0 = create_collect(b, get_src(ctx, &intr->src[0]), ncomp);
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src0 = create_collect(ctx, get_src(ctx, &intr->src[0]), ncomp);
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src1 = ir3_SHR_B(b, offset, 0, create_immed(b, 2), 0);
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src2 = create_collect(b, (struct ir3_instruction*[]){
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src2 = create_collect(ctx, (struct ir3_instruction*[]){
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offset,
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create_immed(b, 0),
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}, 2);
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@ -1414,7 +1415,7 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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*/
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src0 = get_src(ctx, &intr->src[2])[0];
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src1 = ir3_SHR_B(b, offset, 0, create_immed(b, 2), 0);
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src2 = create_collect(b, (struct ir3_instruction*[]){
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src2 = create_collect(ctx, (struct ir3_instruction*[]){
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offset,
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create_immed(b, 0),
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}, 2);
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@ -1451,7 +1452,7 @@ emit_intrinsic_atomic_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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break;
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case nir_intrinsic_ssbo_atomic_comp_swap:
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/* for cmpxchg, src0 is [ui]vec2(data, compare): */
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src0 = create_collect(b, (struct ir3_instruction*[]){
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src0 = create_collect(ctx, (struct ir3_instruction*[]){
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src0,
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get_src(ctx, &intr->src[3])[0],
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}, 2);
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@ -1523,7 +1524,7 @@ emit_intrinsic_store_shared(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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unsigned length = ffs(~(wrmask >> first_component)) - 1;
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stl = ir3_STL(b, offset, 0,
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create_collect(b, &value[first_component], length), 0,
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create_collect(ctx, &value[first_component], length), 0,
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create_immed(b, length), 0);
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stl->cat6.dst_offset = first_component + base;
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stl->cat6.type = TYPE_U32;
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@ -1597,7 +1598,7 @@ emit_intrinsic_atomic_shared(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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break;
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case nir_intrinsic_shared_atomic_comp_swap:
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/* for cmpxchg, src1 is [ui]vec2(data, compare): */
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src1 = create_collect(b, (struct ir3_instruction*[]){
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src1 = create_collect(ctx, (struct ir3_instruction*[]){
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get_src(ctx, &intr->src[2])[0],
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src1,
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}, 2);
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@ -1714,7 +1715,7 @@ get_image_offset(struct ir3_context *ctx, const nir_variable *var,
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offset = ir3_SHR_B(b, offset, 0, create_immed(b, 2), 0);
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}
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return create_collect(b, (struct ir3_instruction*[]){
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return create_collect(ctx, (struct ir3_instruction*[]){
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offset,
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create_immed(b, 0),
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}, 2);
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@ -1738,7 +1739,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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flags |= IR3_INSTR_3D;
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sam = ir3_SAM(b, OPC_ISAM, type, TGSI_WRITEMASK_XYZW, flags,
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tex_idx, tex_idx, create_collect(b, coords, ncoords), NULL);
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tex_idx, tex_idx, create_collect(ctx, coords, ncoords), NULL);
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sam->barrier_class = IR3_BARRIER_IMAGE_R;
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sam->barrier_conflict = IR3_BARRIER_IMAGE_W;
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@ -1771,8 +1772,8 @@ emit_intrinsic_store_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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*/
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stib = ir3_STIB(b, create_immed(b, tex_idx), 0,
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create_collect(b, value, 4), 0,
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create_collect(b, coords, ncoords), 0,
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create_collect(ctx, value, 4), 0,
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create_collect(ctx, coords, ncoords), 0,
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offset, 0);
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stib->cat6.iim_val = 4;
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stib->cat6.d = ncoords;
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@ -1822,7 +1823,7 @@ emit_intrinsic_atomic_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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* src2 is 64b byte offset
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*/
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src0 = get_src(ctx, &intr->src[2])[0];
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src1 = create_collect(b, coords, ncoords);
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src1 = create_collect(ctx, coords, ncoords);
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src2 = get_image_offset(ctx, var, coords, false);
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switch (intr->intrinsic) {
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@ -1849,7 +1850,7 @@ emit_intrinsic_atomic_image(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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break;
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case nir_intrinsic_image_var_atomic_comp_swap:
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/* for cmpxchg, src0 is [ui]vec2(data, compare): */
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src0 = create_collect(b, (struct ir3_instruction*[]){
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src0 = create_collect(ctx, (struct ir3_instruction*[]){
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src0,
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get_src(ctx, &intr->src[3])[0],
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}, 2);
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@ -2036,7 +2037,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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} else {
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src = get_src(ctx, &intr->src[0]);
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struct ir3_instruction *collect =
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create_collect(b, ctx->ir->inputs, ctx->ir->ninputs);
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create_collect(ctx, ctx->ir->inputs, ctx->ir->ninputs);
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struct ir3_instruction *addr = get_addr(ctx, src[0], 4);
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for (int i = 0; i < intr->num_components; i++) {
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unsigned n = idx * 4 + i + comp;
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@ -2497,8 +2498,8 @@ emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
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ctx->max_texture_index = MAX2(ctx->max_texture_index, tex_idx);
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struct ir3_instruction *col0 = create_collect(b, src0, nsrc0);
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struct ir3_instruction *col1 = create_collect(b, src1, nsrc1);
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struct ir3_instruction *col0 = create_collect(ctx, src0, nsrc0);
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struct ir3_instruction *col1 = create_collect(ctx, src1, nsrc1);
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sam = ir3_SAM(b, opc, type, TGSI_WRITEMASK_XYZW, flags,
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tex_idx, tex_idx, col0, col1);
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