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radv: fix using LOAD_CONTEXT_REG with old GFX ME firmwares on GFX8

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This fixes a critical issue.

Cc: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109575
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 1b8983c25b)
This commit is contained in:
Samuel Pitoiset 2019-02-12 09:01:50 +01:00 • committed by Dylan Baker
parent fbcd1ad42c
commit 1f33f3cf3a
3 changed files with 10 additions and 3 deletions
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5
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -1356,7 +1356,7 @@ radv_load_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
uint32_t reg = R_028028_DB_STENCIL_CLEAR + 4 * reg_offset;
if (cmd_buffer->device->physical_device->rad_info.chip_class >= VI) {
if (cmd_buffer->device->physical_device->has_load_ctx_reg_pkt) {
radeon_emit(cs, PKT3(PKT3_LOAD_CONTEXT_REG, 3, 0));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
@ -1518,14 +1518,13 @@ radv_load_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
uint32_t reg = R_028C8C_CB_COLOR0_CLEAR_WORD0 + cb_idx * 0x3c;
if (cmd_buffer->device->physical_device->rad_info.chip_class >= VI) {
if (cmd_buffer->device->physical_device->has_load_ctx_reg_pkt) {
radeon_emit(cs, PKT3(PKT3_LOAD_CONTEXT_REG, 3, cmd_buffer->state.predicating));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2);
radeon_emit(cs, 2);
} else {
/* TODO: Figure out how to use LOAD_CONTEXT_REG on SI/CIK. */
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, cmd_buffer->state.predicating));
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
COPY_DATA_DST_SEL(COPY_DATA_REG) |

5
src/amd/vulkan/radv_device.c
View file

@ -369,6 +369,11 @@ radv_physical_device_init(struct radv_physical_device *device,
device->dcc_msaa_allowed =
(device->instance->perftest_flags & RADV_PERFTEST_DCC_MSAA);
/* TODO: Figure out how to use LOAD_CONTEXT_REG on SI/CIK. */
device->has_load_ctx_reg_pkt = device->rad_info.chip_class >= GFX9 ||
(device->rad_info.chip_class >= VI &&
device->rad_info.me_fw_feature >= 41);
radv_physical_device_init_mem_types(device);
radv_fill_device_extension_table(device, &device->supported_extensions);

3
src/amd/vulkan/radv_private.h
View file

@ -306,6 +306,9 @@ struct radv_physical_device {
/* Whether DCC should be enabled for MSAA textures. */
bool dcc_msaa_allowed;
/* Whether LOAD_CONTEXT_REG packets are supported. */
bool has_load_ctx_reg_pkt;
/* This is the drivers on-disk cache used as a fallback as opposed to
* the pipeline cache defined by apps.
*/