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r100/r200: align to pitch updates in blit interface

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This commit is contained in:
Maciej Cencora 2010-01-20 00:09:11 +01:00
parent 2706bc6a88
commit 1f0709fd8f
2 changed files with 4 additions and 4 deletions
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4
src/mesa/drivers/dri/r200/r200_blit.c
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@ -146,7 +146,7 @@ static void inline emit_tx_setup(struct r200_context *r200,
OUT_BATCH_REGVAL(R200_PP_TXFORMAT_X_0, 0);
OUT_BATCH_REGVAL(R200_PP_TXSIZE_0, ((width - 1) |
((height - 1) << RADEON_TEX_VSIZE_SHIFT)));
OUT_BATCH_REGVAL(R200_PP_TXPITCH_0, pitch - 32);
OUT_BATCH_REGVAL(R200_PP_TXPITCH_0, pitch * _mesa_get_format_bytes(mesa_format) - 32);
OUT_BATCH_REGSEQ(R200_PP_TXOFFSET_0, 1);
OUT_BATCH_RELOC(0, bo, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
@ -162,7 +162,7 @@ static inline void emit_cb_setup(struct r200_context *r200,
unsigned width,
unsigned height)
{
uint32_t dst_pitch = pitch;
uint32_t dst_pitch = pitch * _mesa_get_format_bytes(mesa_format);
uint32_t dst_format = 0;
BATCH_LOCALS(&r200->radeon);

4
src/mesa/drivers/dri/radeon/radeon_blit.c
View file

@ -141,7 +141,7 @@ static void inline emit_tx_setup(struct r100_context *r100,
OUT_BATCH_REGVAL(RADEON_PP_TXFORMAT_0, txformat);
OUT_BATCH_REGVAL(RADEON_PP_TEX_SIZE_0, ((width - 1) |
((height - 1) << RADEON_TEX_VSIZE_SHIFT)));
OUT_BATCH_REGVAL(RADEON_PP_TEX_PITCH_0, pitch - 32);
OUT_BATCH_REGVAL(RADEON_PP_TEX_PITCH_0, pitch * _mesa_get_format_bytes(mesa_format) - 32);
OUT_BATCH_REGSEQ(RADEON_PP_TXOFFSET_0, 1);
OUT_BATCH_RELOC(0, bo, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
@ -157,7 +157,7 @@ static inline void emit_cb_setup(struct r100_context *r100,
unsigned width,
unsigned height)
{
uint32_t dst_pitch = pitch;
uint32_t dst_pitch = pitch * _mesa_get_format_bytes(mesa_format);
uint32_t dst_format = 0;
BATCH_LOCALS(&r100->radeon);