radv: fix binding partial depth/stencil views with dynamic rendering

With dynamic rendering, it's allowed to begin rendering with depth or
stencil only but still with a depth/stencil format. The test below
checks that unbound part of ds isn't modified, if depth is bound and
stencil not and vice versa.

This fixes a recent CTS
dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25350>

src/amd/ci/radv-navi10-aco-fails.txt

@@ -1,3 +1,2 @@
 # New CTS failures in 1.3.7.0
 dEQP-VK.api.version_check.unavailable_entry_points,Fail
-dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil,Fail

src/amd/ci/radv-navi21-aco-flakes.txt

@@ -14,6 +14,5 @@ dEQP-VK.pipeline.*line_stipple_params
 
 # New CTS flakes in 1.3.6.3
 dEQP-VK.ray_tracing_pipeline.pipeline_library.configurations.(single|multi)threaded_compilation.*_check_(all|capture_replay)_handles
-dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil
 
 dEQP-VK.query_pool.statistics_query.host_query_reset.geometry_shader_invocations.secondary.32bits_triangle_list_clear_depth

src/amd/ci/radv-navi31-aco-fails.txt

@@ -1,3 +1,2 @@
 # New CTS failures in 1.3.7.0
 dEQP-VK.api.version_check.unavailable_entry_points,Fail
-dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil,Fail

src/amd/ci/radv-polaris10-aco-fails.txt

@@ -20,4 +20,3 @@ dEQP-VK.texture.mipmap.cubemap.image_view_min_lod.base_level.nearest_nearest,Fai
 
 # New CTS failures in 1.3.7.0.
 dEQP-VK.api.version_check.unavailable_entry_points,Fail
-dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil,Fail

src/amd/ci/radv-renoir-aco-fails.txt

@@ -1,3 +1,2 @@
 # New CTS failures in 1.3.7.0.
 dEQP-VK.api.version_check.unavailable_entry_points,Fail
-dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil,Fail

src/amd/ci/radv-vangogh-aco-flakes.txt

@@ -3,6 +3,3 @@ dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.*
 dEQP-VK.draw.dynamic_rendering.*
 
 dEQP-VK.pipeline.monolithic.image.suballocation.sampling_type.separate.view_type.2d_array.format.r4g4b4a4_unorm_pack16.count_4.size.32x16_array_of_6
-
-# New flakes in CTS 1.3.7.0
-dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil

src/amd/ci/radv-vega10-aco-flakes.txt

@@ -14,6 +14,3 @@ dEQP-VK.multiview.multisample.get_query_pool_results.*
 dEQP-VK.*framebuffer_attachment.diff_attachments.*
 dEQP-VK.*framebuffer_attachment.multi_attachments_not_exported_2d.*
 dEQP-VK.*framebuffer_attachment.resolve_input_same_attachment
-
-# New flakes in CTS 1.3.7.0
-dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil

src/amd/vulkan/radv_cmd_buffer.c

@@ -7664,7 +7664,17 @@ radv_CmdBeginRendering(VkCommandBuffer commandBuffer, const VkRenderingInfo *pRe
 
       assert(d_iview == NULL || s_iview == NULL || d_iview == s_iview);
       ds_att.iview = d_iview ? d_iview : s_iview, ds_att.format = ds_att.iview->vk.format;
-      radv_initialise_ds_surface(cmd_buffer->device, &ds_att.ds, ds_att.iview);
+
+      VkImageAspectFlags ds_aspects;
+      if (d_iview && s_iview) {
+         ds_aspects = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT;
+      } else if (d_iview) {
+         ds_aspects = VK_IMAGE_ASPECT_DEPTH_BIT;
+      } else {
+         ds_aspects = VK_IMAGE_ASPECT_STENCIL_BIT;
+      }
+
+      radv_initialise_ds_surface(cmd_buffer->device, &ds_att.ds, ds_att.iview, ds_aspects);
 
       assert(d_res_iview == NULL || s_res_iview == NULL || d_res_iview == s_res_iview);
       ds_att.resolve_iview = d_res_iview ? d_res_iview : s_res_iview;

src/amd/vulkan/radv_device.c

@@ -1881,7 +1881,7 @@ radv_initialise_vrs_surface(struct radv_image *image, struct radv_buffer *htile_
 
 void
 radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buffer_info *ds,
-                           struct radv_image_view *iview)
+                           struct radv_image_view *iview, VkImageAspectFlags ds_aspects)
 {
    unsigned level = iview->vk.base_mip_level;
    unsigned format, stencil_format;
@@ -1898,7 +1898,9 @@ radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buff
    stencil_format = surf->has_stencil ? V_028044_STENCIL_8 : V_028044_STENCIL_INVALID;
 
    uint32_t max_slice = radv_surface_max_layer_count(iview) - 1;
-   ds->db_depth_view = S_028008_SLICE_START(iview->vk.base_array_layer) | S_028008_SLICE_MAX(max_slice);
+   ds->db_depth_view = S_028008_SLICE_START(iview->vk.base_array_layer) | S_028008_SLICE_MAX(max_slice) |
+                       S_028008_Z_READ_ONLY(!(ds_aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) |
+                       S_028008_STENCIL_READ_ONLY(!(ds_aspects & VK_IMAGE_ASPECT_STENCIL_BIT));
    if (device->physical_device->rad_info.gfx_level >= GFX10) {
       ds->db_depth_view |=
          S_028008_SLICE_START_HI(iview->vk.base_array_layer >> 11) | S_028008_SLICE_MAX_HI(max_slice >> 11);

src/amd/vulkan/radv_private.h

@@ -1546,7 +1546,7 @@ struct radv_ds_buffer_info {
 void radv_initialise_color_surface(struct radv_device *device, struct radv_color_buffer_info *cb,
                                    struct radv_image_view *iview);
 void radv_initialise_ds_surface(const struct radv_device *device, struct radv_ds_buffer_info *ds,
-                                struct radv_image_view *iview);
+                                struct radv_image_view *iview, VkImageAspectFlags ds_aspects);
 void radv_initialise_vrs_surface(struct radv_image *image, struct radv_buffer *htile_buffer,
                                  struct radv_ds_buffer_info *ds);