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amd/vpelib: Realign DPP callback initialization with the updated interface layout

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Realign DPP callback initialization with the updated interface layout

Acked-by: Peyton Lee <peytolee@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42033>
This commit is contained in:
Shih, Jude 2026-04-27 20:36:30 +08:00 • committed by Marge Bot
parent cc61f110b1
commit 1ea42fb3b8
8 changed files with 33 additions and 18 deletions
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2
src/amd/vpelib/inc/vpe_types.h
View file

@ -186,6 +186,8 @@ struct vpe_pixel_format_support {
uint32_t yuy2 : 1; /**< packed 4:2:2 8-bits */
uint32_t y210 : 1; /**< packed 4:2:2 10-bit */
uint32_t y216 : 1; /**< packed 4:2:2 16-bit */
uint32_t y410 : 1; /**< packed 4:4:4 10-bit */
uint32_t y416 : 1; /**< packed 4:4:4 16-bit */
uint32_t p210 : 1; /**< planar 4:2:2 10-bit */
uint32_t p216 : 1; /**< planar 4:2:2 16-bit */
uint32_t rgb8_planar : 1; /**< planar RGB 8-bit */

4
src/amd/vpelib/src/chip/vpe10/vpe10_resource.c
View file

@ -249,6 +249,8 @@ static struct vpe_caps
.yuy2 = 0, /**< packed 4:2:2 */
.y210 = 0, /**< packed 4:2:2 10-bit */
.y216 = 0, /**< packed 4:2:2 16-bit */
.y410 = 0, /**< packed 4:4:4 10-bit */
.y416 = 0, /**< packed 4:4:4 16-bit */
.p210 = 0, /**< planar 4:2:2 10-bit */
.p216 = 0, /**< planar 4:2:2 16-bit */
.rgb8_planar = 0, /**< planar RGB 8-bit */
@ -272,6 +274,8 @@ static struct vpe_caps
.yuy2 = 0, /**< packed 4:2:2 */
.y210 = 0, /**< packed 4:2:2 10-bit */
.y216 = 0, /**< packed 4:2:2 16-bit */
.y410 = 0, /**< packed 4:4:4 10-bit */
.y416 = 0, /**< packed 4:4:4 16-bit */
.p210 = 0, /**< planar 4:2:2 10-bit */
.p216 = 0, /**< planar 4:2:2 16-bit */
.rgb8_planar = 0, /**< planar RGB 8-bit */

16
src/amd/vpelib/src/chip/vpe20/vpe20_dpp.c
View file

@ -35,8 +35,6 @@
#define CTX vpe20_dpp
static struct dpp_funcs vpe20_dpp_funcs = {
.enable_clocks = vpe20_dpp_enable_clocks,
// cnv
.program_cnv = vpe20_dpp_program_cnv,
.program_pre_dgam = vpe10_dpp_cnv_program_pre_dgam,
@ -48,9 +46,9 @@ static struct dpp_funcs vpe20_dpp_funcs = {
// cm
.program_input_transfer_func = vpe20_dpp_program_input_transfer_func,
.program_gamut_remap = NULL,
.program_post_csc = vpe10_dpp_program_post_csc,
.set_hdr_multiplier = vpe10_dpp_set_hdr_multiplier,
.program_histogram = vpe20_dpp_program_histo,
.program_post_csc = vpe10_dpp_program_post_csc,
.set_hdr_multiplier = vpe10_dpp_set_hdr_multiplier,
// scaler
.get_optimal_number_of_taps = vpe10_dpp_get_optimal_number_of_taps,
.dscl_calc_lb_num_partitions = vpe10_dscl_calc_lb_num_partitions,
@ -59,10 +57,12 @@ static struct dpp_funcs vpe20_dpp_funcs = {
.set_frame_scaler = vpe20_dpp_set_frame_scaler,
.get_line_buffer_size = vpe10_get_line_buffer_size,
.validate_number_of_taps = vpe10_dpp_validate_number_of_taps,
.enable_clocks = vpe20_dpp_enable_clocks,
.dscl_program_easf = vpe20_dscl_program_easf,
.dscl_disable_easf = vpe20_dscl_disable_easf,
.dscl_program_isharp = vpe20_dscl_program_isharp,
.program_histogram = vpe20_dpp_program_histo,
.dscl_program_easf = vpe20_dscl_program_easf,
.dscl_disable_easf = vpe20_dscl_disable_easf,
.dscl_program_isharp = vpe20_dscl_program_isharp,
};
void vpe20_construct_dpp(struct vpe_priv *vpe_priv, struct dpp *dpp)

2
src/amd/vpelib/src/chip/vpe20/vpe20_mpc.c
View file

@ -889,7 +889,7 @@ void vpe20_mpc_set_mpc_shaper_3dlut(
if (stream_ctx->stream.lut_compound.enabled == true) {
mpc->funcs->program_shaper_indirect(mpc, &stream_ctx->stream.dma_info.shaper);
} else {
// get the shaper lut params
// get the shaper lut params
if (func_shaper) {
if (func_shaper->type == TF_TYPE_DISTRIBUTED_POINTS) {
vpe10_cm_helper_translate_curve_to_hw_format(func_shaper, &mpc->shaper_params, true,

4
src/amd/vpelib/src/chip/vpe20/vpe20_resource.c
View file

@ -270,6 +270,8 @@ static struct vpe_caps
.yuy2 = 1, /**< packed 4:2:2 */
.y210 = 1, /**< packed 4:2:2 10-bit */
.y216 = 1, /**< packed 4:2:2 16-bit */
.y410 = 1, /**< packed 4:4:4 10-bit */
.y416 = 1, /**< packed 4:4:4 16-bit */
.p210 = 1, /**< planar 4:2:2 10-bit */
.p216 = 1, /**< planar 4:2:2 16-bit */
.rgb8_planar = 1, /**< planar RGB 8-bit */
@ -293,6 +295,8 @@ static struct vpe_caps
.yuy2 = 1, /**< packed 4:2:2 */
.y210 = 1, /**< packed 4:2:2 10-bit */
.y216 = 1, /**< packed 4:2:2 16-bit */
.y410 = 1, /**< packed 4:4:4 10-bit */
.y416 = 1, /**< packed 4:4:4 16-bit */
.p210 = 1, /**< planar 4:2:2 10-bit */
.p216 = 1, /**< planar 4:2:2 16-bit */
.rgb8_planar = 1, /**< planar RGB 8-bit */

4
src/amd/vpelib/src/chip/vpe22/vpe22_resource.c
View file

@ -263,6 +263,8 @@ static struct vpe_caps
.yuy2 = 1, /**< packed 4:2:2 */
.y210 = 1, /**< packed 4:2:2 10-bit */
.y216 = 1, /**< packed 4:2:2 16-bit */
.y410 = 1, /**< packed 4:4:4 10-bit */
.y416 = 1, /**< packed 4:4:4 16-bit */
.p210 = 1, /**< planar 4:2:2 10-bit */
.p216 = 1, /**< planar 4:2:2 16-bit */
.rgb8_planar = 1, /**< planar RGB 8-bit */
@ -285,6 +287,8 @@ static struct vpe_caps
.yuy2 = 1, /**< packed 4:2:2 */
.y210 = 1, /**< packed 4:2:2 10-bit */
.y216 = 1, /**< packed 4:2:2 16-bit */
.y410 = 1, /**< packed 4:4:4 10-bit */
.y416 = 1, /**< packed 4:4:4 16-bit */
.p210 = 1, /**< planar 4:2:2 10-bit */
.p216 = 1, /**< planar 4:2:2 16-bit */
.rgb8_planar = 1, /**< planar RGB 8-bit */

1
src/amd/vpelib/src/core/color.c
View file

@ -1062,7 +1062,6 @@ enum vpe_status vpe_color_update_movable_cm(
vpe_color_get_color_space_and_tf(&tm_out_cs, &out_lut_cs, &tf);
vpe_color_update_gamut(vpe_priv, out_lut_cs, vpe_priv->output_ctx.cs,
output_ctx->gamut_remap, !enable_3dlut);
}
}
exit:

18
src/amd/vpelib/src/core/inc/dpp.h
View file

@ -74,13 +74,7 @@ enum input_csc_select {
struct dpp_funcs {
bool (*get_optimal_number_of_taps)(
struct vpe_rect *src_rect, struct vpe_rect *dst_rect, struct vpe_scaling_taps *taps);
void (*dscl_calc_lb_num_partitions)(const struct scaler_data *scl_data,
enum lb_memory_config lb_config, uint32_t *num_part_y, uint32_t *num_part_c);
/** non segment specific */
/** non segment specific - CNV */
void (*program_cnv)(
struct dpp *dpp, enum vpe_surface_pixel_format format, enum vpe_expansion_mode mode);
@ -93,6 +87,9 @@ struct dpp_funcs {
void (*program_alpha_keyer)(struct dpp *dpp, const struct cnv_keyer_params *keyer_params);
void (*program_crc)(struct dpp *opp, bool enable);
/** CM */
void (*program_input_transfer_func)(struct dpp *dpp, struct transfer_func *input_tf);
void (*program_gamut_remap)(struct dpp *dpp, struct colorspace_transform *gamut_remap);
@ -104,6 +101,12 @@ struct dpp_funcs {
void (*set_hdr_multiplier)(struct dpp *dpp, uint32_t multiplier);
/** scaler */
bool (*get_optimal_number_of_taps)(
struct vpe_rect *src_rect, struct vpe_rect *dst_rect, struct vpe_scaling_taps *taps);
void (*dscl_calc_lb_num_partitions)(const struct scaler_data *scl_data,
enum lb_memory_config lb_config, uint32_t *num_part_y, uint32_t *num_part_c);
void (*set_segment_scaler)(struct dpp *dpp, const struct scaler_data *scl_data);
void (*dscl_set_scaler_position)(struct dpp *dpp, const struct scaler_data *scl_data);
@ -123,7 +126,6 @@ struct dpp_funcs {
void (*program_histogram)(struct dpp* dpp, struct vpe_histogram_param* hist_param, enum color_space cs);
void (*program_crc)(struct dpp *opp, bool enable);
};
struct dpp {