panfrost/midgard: Implement fpow

We have a native op for this, which was just found in a disassembly --
so instead of lowering, use it!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig 2019-03-13 05:01:43 +00:00
parent 2eb65c2173
commit 1ea42894c7
4 changed files with 4 additions and 1 deletions

View file

@ -228,6 +228,7 @@ static unsigned alu_opcode_props[256] = {
[midgard_alu_op_frcp] = UNIT_VLUT,
[midgard_alu_op_frsqrt] = UNIT_VLUT,
[midgard_alu_op_fsqrt] = UNIT_VLUT,
[midgard_alu_op_fpow] = UNIT_VLUT,
[midgard_alu_op_fexp2] = UNIT_VLUT,
[midgard_alu_op_flog2] = UNIT_VLUT,

View file

@ -108,6 +108,7 @@ typedef enum {
midgard_alu_op_fcsel = 0xC5,
midgard_alu_op_fround = 0xC6,
midgard_alu_op_fatan_pt2 = 0xE8,
midgard_alu_op_fpow = 0xEC,
midgard_alu_op_frcp = 0xF0,
midgard_alu_op_frsqrt = 0xF2,
midgard_alu_op_fsqrt = 0xF3,
@ -462,6 +463,7 @@ static char *alu_opcode_names[256] = {
[midgard_alu_op_frcp] = "frcp",
[midgard_alu_op_frsqrt] = "frsqrt",
[midgard_alu_op_fsqrt] = "fsqrt",
[midgard_alu_op_fpow] = "fpow",
[midgard_alu_op_fexp2] = "fexp2",
[midgard_alu_op_flog2] = "flog2",
[midgard_alu_op_fsin] = "fsin",

View file

@ -990,6 +990,7 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
ALU_CASE(frcp, frcp);
ALU_CASE(frsq, frsqrt);
ALU_CASE(fsqrt, fsqrt);
ALU_CASE(fpow, fpow);
ALU_CASE(fexp2, fexp2);
ALU_CASE(flog2, flog2);

View file

@ -62,7 +62,6 @@ midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_bl
static const nir_shader_compiler_options midgard_nir_options = {
.lower_ffma = true,
.lower_sub = true,
.lower_fpow = true,
.lower_scmp = true,
.lower_flrp32 = true,
.lower_flrp64 = true,