fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-26 23:40:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

iris: Add GPU breakpoint before/after draw call

Browse source 
This change allow us to insert the MI_SEMAPHORE_WAIT before/after
specific draw call. With GTX tool, we can always update the memory
address to unblock spinning wait.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24308>
This commit is contained in:
Sagar Ghuge 2023-07-20 13:14:29 -07:00 • committed by Marge Bot
parent 49eabb9ea6
commit 1e3b40ffcf
5 changed files with 48 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/gallium/drivers/iris/iris_context.h
View file

@ -755,6 +755,9 @@ struct iris_context {
/** Frame number for debug prints */
uint32_t frame;
/** Track draw call count for adding GPU breakpoint on 3DPRIMITIVE */
uint32_t draw_call_count;
struct {
uint64_t dirty;
uint64_t stage_dirty;
@ -1137,8 +1140,6 @@ void gfx9_toggle_preemption(struct iris_context *ice,
struct iris_batch *batch,
const struct pipe_draw_info *draw);
#ifdef genX
# include "iris_genx_protos.h"
#else

11
src/gallium/drivers/iris/iris_genx_protos.h
View file

@ -43,6 +43,17 @@ void genX(update_pma_fix)(struct iris_context *ice,
void genX(invalidate_aux_map_state)(struct iris_batch *batch);
void genX(emit_breakpoint)(struct iris_batch *batch, bool emit_before_draw);
static inline void
genX(maybe_emit_breakpoint)(struct iris_batch *batch,
bool emit_before_draw)
{
if (INTEL_DEBUG(DEBUG_DRAW_BKP))
genX(emit_breakpoint)(batch, emit_before_draw);
}
/* iris_blorp.c */
void genX(init_blorp)(struct iris_context *ice);

6
src/gallium/drivers/iris/iris_screen.c
View file

@ -668,6 +668,7 @@ iris_screen_destroy(struct iris_screen *screen)
util_queue_destroy(&screen->shader_compiler_queue);
glsl_type_singleton_decref();
iris_bo_unreference(screen->workaround_bo);
iris_bo_unreference(screen->breakpoint_bo);
u_transfer_helper_destroy(screen->base.transfer_helper);
iris_bufmgr_unref(screen->bufmgr);
disk_cache_destroy(screen->disk_cache);
@ -850,6 +851,11 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
if (!screen->workaround_bo)
return NULL;
screen->breakpoint_bo = iris_bo_alloc(screen->bufmgr, "breakpoint", 4, 4,
IRIS_MEMZONE_OTHER, BO_ALLOC_ZEROED);
if (!screen->breakpoint_bo)
return NULL;
if (!iris_init_identifier_bo(screen))
return NULL;

2
src/gallium/drivers/iris/iris_screen.h
View file

@ -232,6 +232,8 @@ struct iris_screen {
/** Every screen on a bufmgr has an unique ID assigned by the bufmgr. */
int id;
struct iris_bo *breakpoint_bo;
};
struct pipe_screen *

26
src/gallium/drivers/iris/iris_state.c
View file

@ -7525,6 +7525,28 @@ point_or_line_list(enum mesa_prim prim_type)
return false;
}
void
genX(emit_breakpoint)(struct iris_batch *batch, bool emit_before_draw)
{
struct iris_context *ice = batch->ice;
uint32_t draw_count = emit_before_draw ?
p_atomic_inc_return(&ice->draw_call_count) :
p_atomic_read(&ice->draw_call_count);
if (((draw_count == intel_debug_bkp_before_draw_count &&
emit_before_draw) ||
(draw_count == intel_debug_bkp_after_draw_count &&
!emit_before_draw))) {
iris_emit_cmd(batch, GENX(MI_SEMAPHORE_WAIT), sem) {
sem.WaitMode = PollingMode;
sem.CompareOperation = COMPARE_SAD_EQUAL_SDD;
sem.SemaphoreDataDword = 0x1;
sem.SemaphoreAddress = rw_bo(batch->screen->breakpoint_bo, 0,
IRIS_DOMAIN_OTHER_WRITE);
};
}
}
static void
iris_upload_render_state(struct iris_context *ice,
struct iris_batch *batch,
@ -7747,6 +7769,8 @@ iris_upload_render_state(struct iris_context *ice,
iris_measure_snapshot(ice, batch, INTEL_SNAPSHOT_DRAW, draw, indirect, sc);
genX(maybe_emit_breakpoint)(batch, true);
iris_emit_cmd(batch, GENX(3DPRIMITIVE), prim) {
prim.VertexAccessType = draw->index_size > 0 ? RANDOM : SEQUENTIAL;
prim.PredicateEnable = use_predicate;
@ -7766,6 +7790,8 @@ iris_upload_render_state(struct iris_context *ice,
}
}
genX(maybe_emit_breakpoint)(batch, false);
#if GFX_VERx10 == 125
if (intel_needs_workaround(devinfo, 22014412737) &&
(point_or_line_list(ice->state.prim_mode) || indirect ||