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i965: Use intel_get_tile_dims() to get tile masks

Browse source 
This will require change in the parameters passed to
intel_miptree_get_tile_masks().

V2: Rearrange the order of parameters. (Ben)
    Change the name to intel_get_tile_masks(). (Topi)

V3: Use temporary variables in intel_get_tile_masks()
    for clarity. Fix mask_y computation.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
This commit is contained in:
Anuj Phogat 2015-08-18 15:47:13 -07:00
parent 21fdc59d34
commit 1dc41be9eb
4 changed files with 28 additions and 33 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/mesa/drivers/dri/i965/brw_blorp.cpp
View file

@ -144,7 +144,9 @@ brw_blorp_surface_info::compute_tile_offsets(uint32_t *tile_x,
{
uint32_t mask_x, mask_y;
intel_miptree_get_tile_masks(mt, &mask_x, &mask_y, map_stencil_as_y_tiled);
intel_get_tile_masks(mt->tiling, mt->tr_mode, mt->cpp,
map_stencil_as_y_tiled,
&mask_x, &mask_y);
*tile_x = x_offset & mask_x;
*tile_y = y_offset & mask_y;

20
src/mesa/drivers/dri/i965/brw_misc_state.c
View file

@ -174,13 +174,17 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
uint32_t tile_mask_x = 0, tile_mask_y = 0;
if (depth_mt) {
intel_miptree_get_tile_masks(depth_mt, &tile_mask_x, &tile_mask_y, false);
intel_get_tile_masks(depth_mt->tiling, depth_mt->tr_mode,
depth_mt->cpp, false,
&tile_mask_x, &tile_mask_y);
if (intel_miptree_level_has_hiz(depth_mt, depth_level)) {
uint32_t hiz_tile_mask_x, hiz_tile_mask_y;
intel_miptree_get_tile_masks(depth_mt->hiz_buf->mt,
&hiz_tile_mask_x, &hiz_tile_mask_y,
false);
intel_get_tile_masks(depth_mt->hiz_buf->mt->tiling,
depth_mt->hiz_buf->mt->tr_mode,
depth_mt->hiz_buf->mt->cpp,
false, &hiz_tile_mask_x,
&hiz_tile_mask_y);
/* Each HiZ row represents 2 rows of pixels */
hiz_tile_mask_y = hiz_tile_mask_y << 1 | 1;
@ -200,9 +204,11 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
tile_mask_y |= 63;
} else {
uint32_t stencil_tile_mask_x, stencil_tile_mask_y;
intel_miptree_get_tile_masks(stencil_mt,
&stencil_tile_mask_x,
&stencil_tile_mask_y, false);
intel_get_tile_masks(stencil_mt->tiling,
stencil_mt->tr_mode,
stencil_mt->cpp,
false, &stencil_tile_mask_x,
&stencil_tile_mask_y);
tile_mask_x |= stencil_tile_mask_x;
tile_mask_y |= stencil_tile_mask_y;

31
src/mesa/drivers/dri/i965/intel_mipmap_tree.c
View file

@ -1119,31 +1119,18 @@ intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
* untiled, the masks are set to 0.
*/
void
intel_miptree_get_tile_masks(const struct intel_mipmap_tree *mt,
uint32_t *mask_x, uint32_t *mask_y,
bool map_stencil_as_y_tiled)
intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
bool map_stencil_as_y_tiled,
uint32_t *mask_x, uint32_t *mask_y)
{
int cpp = mt->cpp;
uint32_t tiling = mt->tiling;
uint32_t tile_w_bytes, tile_h;
if (map_stencil_as_y_tiled)
tiling = I915_TILING_Y;
switch (tiling) {
default:
unreachable("not reached");
case I915_TILING_NONE:
*mask_x = *mask_y = 0;
break;
case I915_TILING_X:
*mask_x = 512 / cpp - 1;
*mask_y = 7;
break;
case I915_TILING_Y:
*mask_x = 128 / cpp - 1;
*mask_y = 31;
break;
}
intel_get_tile_dims(tiling, tr_mode, cpp, &tile_w_bytes, &tile_h);
*mask_x = tile_w_bytes / cpp - 1;
*mask_y = tile_h - 1;
}
/**
@ -1208,7 +1195,7 @@ intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
uint32_t x, y;
uint32_t mask_x, mask_y;
intel_miptree_get_tile_masks(mt, &mask_x, &mask_y, false);
intel_get_tile_masks(mt->tiling, mt->tr_mode, mt->cpp, false, &mask_x, &mask_y);
intel_miptree_get_image_offset(mt, level, slice, &x, &y);
*tile_x = x & mask_x;

6
src/mesa/drivers/dri/i965/intel_mipmap_tree.h
View file

@ -623,9 +623,9 @@ intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
int *width, int *height, int *depth);
void
intel_miptree_get_tile_masks(const struct intel_mipmap_tree *mt,
uint32_t *mask_x, uint32_t *mask_y,
bool map_stencil_as_y_tiled);
intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
bool map_stencil_as_y_tiled,
uint32_t *mask_x, uint32_t *mask_y);
void
intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,