From 1dbfd2be4b13da08e097bfdcdb000283e4ebe741 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 26 Apr 2022 14:20:56 +0200 Subject: [PATCH] radv: allow to disable sinking of load inputs for FS via drirc To workaround game bugs where partial derivatives are used in non-uniform control flow. A proper solution needs to be implemented, but as a quick fix disabling nir_opt_sink() works. Cc: mesa-stable Signed-off-by: Samuel Pitoiset Reviewed-by: Rhys Perry Part-of: --- src/amd/vulkan/radv_device.c | 4 ++++ src/amd/vulkan/radv_pipeline.c | 14 ++++++++++++-- src/amd/vulkan/radv_private.h | 1 + src/amd/vulkan/radv_shader.h | 1 + src/util/driconf.h | 4 ++++ 5 files changed, 22 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 48cfcaf7998..34a8bba2942 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -959,6 +959,7 @@ static const driOptionDescription radv_dri_options[] = { DRI_CONF_RADV_REQUIRE_ETC2(false) DRI_CONF_RADV_DISABLE_HTILE_LAYERS(false) DRI_CONF_RADV_DISABLE_ANISO_SINGLE_LEVEL(false) + DRI_CONF_RADV_DISABLE_SINKING_LOAD_INPUT_FS(false) DRI_CONF_SECTION_END }; // clang-format on @@ -1010,6 +1011,9 @@ radv_init_dri_options(struct radv_instance *instance) instance->disable_aniso_single_level = driQueryOptionb(&instance->dri_options, "radv_disable_aniso_single_level"); + + instance->disable_sinking_load_input_fs = + driQueryOptionb(&instance->dri_options, "radv_disable_sinking_load_input_fs"); } VKAPI_ATTR VkResult VKAPI_CALL diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 985b5129708..1b84ccbb77d 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3151,6 +3151,9 @@ radv_generate_graphics_pipeline_key(const struct radv_pipeline *pipeline, device->physical_device->rad_info.family == CHIP_VANGOGH)) key.adjust_frag_coord_z = true; + if (device->instance->disable_sinking_load_input_fs) + key.disable_sinking_load_input_fs = true; + return key; } @@ -4470,7 +4473,11 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout .allow_fp16 = device->physical_device->rad_info.chip_class >= GFX9, }); - nir_opt_sink(stages[i].nir, nir_move_load_input | nir_move_const_undef | nir_move_copies); + nir_move_options sink_opts = nir_move_const_undef | nir_move_copies; + if (i != MESA_SHADER_FRAGMENT || !pipeline_key->disable_sinking_load_input_fs) + sink_opts |= nir_move_load_input; + + nir_opt_sink(stages[i].nir, sink_opts); nir_opt_move(stages[i].nir, nir_move_load_input | nir_move_const_undef | nir_move_copies); /* Lower I/O intrinsics to memory instructions. */ @@ -4513,9 +4520,12 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout /* cleanup passes */ nir_lower_load_const_to_scalar(stages[i].nir); + + sink_opts |= nir_move_comparisons | nir_move_load_ubo | nir_move_load_ssbo; + nir_opt_sink(stages[i].nir, sink_opts); + nir_move_options move_opts = nir_move_const_undef | nir_move_load_ubo | nir_move_load_input | nir_move_comparisons | nir_move_copies; - nir_opt_sink(stages[i].nir, move_opts | nir_move_load_ssbo); nir_opt_move(stages[i].nir, move_opts); stages[i].feedback.duration += os_time_get_nano() - stage_start; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 89c66a0af86..31c82f80643 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -354,6 +354,7 @@ struct radv_instance { bool disable_htile_layers; bool disable_aniso_single_level; bool zero_vram; + bool disable_sinking_load_input_fs; }; VkResult radv_init_wsi(struct radv_physical_device *physical_device); diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 8311405d373..30a2538aa49 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -63,6 +63,7 @@ struct radv_pipeline_key { uint32_t use_ngg : 1; uint32_t adjust_frag_coord_z : 1; uint32_t disable_aniso_single_level : 1; + uint32_t disable_sinking_load_input_fs : 1; struct { uint32_t instance_rate_inputs; diff --git a/src/util/driconf.h b/src/util/driconf.h index e580f6fe2d8..8bfabce676a 100644 --- a/src/util/driconf.h +++ b/src/util/driconf.h @@ -576,6 +576,10 @@ DRI_CONF_OPT_B(radv_disable_aniso_single_level, def, \ "Disable anisotropic filtering for single level images") +#define DRI_CONF_RADV_DISABLE_SINKING_LOAD_INPUT_FS(def) \ + DRI_CONF_OPT_B(radv_disable_sinking_load_input_fs, def, \ + "Disable sinking load inputs for fragment shaders") + /** * \brief ANV specific configuration options */