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intel/brw: Fix decoding of cond_modifier and saturate in EU validation
These fields are only valid in certain formats, so set them accordingly.
Note the check if !is_send is used because FORMAT_BASIC is reused for
SEND/SENDS in some platforms. If we start to see more cases like that,
we can create a new FORMAT for it.
The cond_modifier is trickier because on top of that, it is not valid
for 64-bit immediates in some platforms. Found when EU validation
complained about moving 64-bit immediates with higher bits.
Fixes: e4440df2d8 ("intel/brw: Add pred/cmod/sat to brw_hw_decoded_inst")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32287>
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1 changed files with 14 additions and 2 deletions
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@ -2208,9 +2208,7 @@ brw_hw_decode_inst(const struct brw_isa_info *isa,
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}
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inst->access_mode = brw_inst_access_mode(devinfo, raw);
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inst->cond_modifier = brw_inst_cond_modifier(devinfo, raw);
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inst->pred_control = brw_inst_pred_control(devinfo, raw);
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inst->saturate = brw_inst_saturate(devinfo, raw);
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RETURN_ERROR_IF(inst->num_sources == 3 && inst->access_mode == BRW_ALIGN_1 && devinfo->ver == 9,
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"Align1 mode not allowed on Gfx9 for 3-src instructions");
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@ -2510,6 +2508,20 @@ brw_hw_decode_inst(const struct brw_isa_info *isa,
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"Invalid source register type encoding.");
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}
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if ((format == FORMAT_BASIC ||
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format == FORMAT_BASIC_THREE_SRC ||
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format == FORMAT_DPAS_THREE_SRC) &&
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!inst_is_send(inst)) {
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inst->saturate = brw_inst_saturate(devinfo, raw);
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if (inst->num_sources > 1 ||
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devinfo->ver < 12 ||
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inst->src[0].file != IMM ||
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brw_type_size_bytes(inst->src[0].type) < 8) {
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inst->cond_modifier = brw_inst_cond_modifier(devinfo, raw);
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}
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}
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return error_msg;
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}
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