diff --git a/.pick_status.json b/.pick_status.json
index 8530f0a4331..48eb6767b3c 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -112,7 +112,7 @@
         "description": "intel/mi_builder: fix self modifying batches",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "796fccce631bf8ecb6ce2fd1a68f219788693a6e"
     },
diff --git a/src/intel/common/gen_mi_builder.h b/src/intel/common/gen_mi_builder.h
index ddd8459ef07..47fb98e99f7 100644
--- a/src/intel/common/gen_mi_builder.h
+++ b/src/intel/common/gen_mi_builder.h
@@ -932,6 +932,13 @@ gen_mi_store_address(struct gen_mi_builder *b,
 static inline void
 gen_mi_self_mod_barrier(struct gen_mi_builder *b)
 {
+   /* First make sure all the memory writes from previous modifying commands
+    * have landed. We want to do this before going through the CS cache,
+    * otherwise we could be fetching memory that hasn't been written to yet.
+    */
+   gen_mi_builder_emit(b, GENX(PIPE_CONTROL), pc) {
+      pc.CommandStreamerStallEnable = true;
+   }
    /* Documentation says Gen11+ should be able to invalidate the command cache
     * but experiment show it doesn't work properly, so for now just get over
     * the CS prefetch.