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gallium,mesa: replace get_shader_param with pipe_shader_caps access

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Use command:
  find . -type d -path "./.git" -prune -o -type f -exec sed -i -E ':a;N;$!ba;s/->get_shader_param\(([[:space:]]*[^,]*),([[:space:]]*)([^,]*),([[:space:]]*)PIPE_SHADER_CAP_([A-Za-z0-9_]+)\)/->shader_caps[\3].\L\5/g' {} +

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33176>
This commit is contained in:
Qiang Yu 2025-01-22 15:07:36 +08:00
parent 916bdf0892
commit 1cc42f1493
18 changed files with 116 additions and 209 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

33
src/gallium/auxiliary/cso_cache/cso_context.c
View file

@ -312,26 +312,21 @@ cso_create_context(struct pipe_context *pipe, unsigned flags)
/* Enable for testing: */
if (0) cso_set_maximum_cache_size(&ctx->cache, 4);
if (pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_GEOMETRY,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0) {
if (pipe->screen->shader_caps[PIPE_SHADER_GEOMETRY].max_instructions > 0) {
ctx->has_geometry_shader = true;
}
if (pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_TESS_CTRL,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0) {
if (pipe->screen->shader_caps[PIPE_SHADER_TESS_CTRL].max_instructions > 0) {
ctx->has_tessellation = true;
}
if (pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0) {
if (pipe->screen->shader_caps[PIPE_SHADER_COMPUTE].max_instructions > 0) {
int supported_irs =
pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_SUPPORTED_IRS);
pipe->screen->shader_caps[PIPE_SHADER_COMPUTE].supported_irs;
if (supported_irs & ((1 << PIPE_SHADER_IR_TGSI) |
(1 << PIPE_SHADER_IR_NIR))) {
ctx->has_compute_shader = true;
}
}
if (pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_MESH,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0) {
if (pipe->screen->shader_caps[PIPE_SHADER_MESH].max_instructions > 0) {
ctx->has_task_mesh_shader = true;
}
if (pipe->screen->caps.max_stream_output_buffers != 0) {
@ -343,8 +338,7 @@ cso_create_context(struct pipe_context *pipe, unsigned flags)
ctx->sampler_format = true;
ctx->max_fs_samplerviews =
pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
pipe->screen->shader_caps[PIPE_SHADER_FRAGMENT].max_texture_samplers;
ctx->max_sampler_seen = -1;
return &ctx->base;
@ -394,16 +388,11 @@ cso_unbind_context(struct cso_context *cso)
break;
}
int maxsam = scr->get_shader_param(scr, sh,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
int maxview = scr->get_shader_param(scr, sh,
PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS);
int maxssbo = scr->get_shader_param(scr, sh,
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS);
int maxcb = scr->get_shader_param(scr, sh,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS);
int maximg = scr->get_shader_param(scr, sh,
PIPE_SHADER_CAP_MAX_SHADER_IMAGES);
int maxsam = scr->shader_caps[sh].max_texture_samplers;
int maxview = scr->shader_caps[sh].max_sampler_views;
int maxssbo = scr->shader_caps[sh].max_shader_buffers;
int maxcb = scr->shader_caps[sh].max_const_buffers;
int maximg = scr->shader_caps[sh].max_shader_images;
assert(maxsam <= PIPE_MAX_SAMPLERS);
assert(maxview <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
assert(maxssbo <= PIPE_MAX_SHADER_BUFFERS);

3
src/gallium/auxiliary/draw/draw_vs.c
View file

@ -70,8 +70,7 @@ draw_create_vertex_shader(struct draw_context *draw,
if (draw->pt.middle.llvm) {
struct pipe_screen *screen = draw->pipe->screen;
if (shader->type == PIPE_SHADER_IR_NIR &&
!screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_INTEGERS)) {
!screen->shader_caps[PIPE_SHADER_VERTEX].integers) {
state.type = PIPE_SHADER_IR_TGSI;
state.tokens = nir_to_tgsi(shader->ir.nir, screen);
is_allocated = true;

17
src/gallium/auxiliary/nir/nir_to_tgsi.c
View file

@ -3304,8 +3304,7 @@ ntt_no_indirects_mask(nir_shader *s, struct pipe_screen *screen)
indirect_mask |= nir_var_shader_out;
}
if (!screen->get_shader_param(screen, pipe_stage,
PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR)) {
if (!screen->shader_caps[pipe_stage].indirect_temp_addr) {
indirect_mask |= nir_var_function_temp;
}
@ -3319,8 +3318,7 @@ ntt_optimize_nir(struct nir_shader *s, struct pipe_screen *screen,
bool progress;
unsigned pipe_stage = pipe_shader_type_from_mesa(s->info.stage);
unsigned control_flow_depth =
screen->get_shader_param(screen, pipe_stage,
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH);
screen->shader_caps[pipe_stage].max_control_flow_depth;
do {
progress = false;
@ -3679,8 +3677,7 @@ ntt_fix_nir_options(struct pipe_screen *screen, struct nir_shader *s,
{
const struct nir_shader_compiler_options *options = s->options;
bool lower_fsqrt =
!screen->get_shader_param(screen, pipe_shader_type_from_mesa(s->info.stage),
PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED);
!screen->shader_caps[pipe_shader_type_from_mesa(s->info.stage)].tgsi_sqrt_supported;
bool force_indirect_unrolling_sampler =
screen->caps.glsl_feature_level < 400;
@ -3882,9 +3879,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
struct ntt_compile *c;
const void *tgsi_tokens;
nir_variable_mode no_indirects_mask = ntt_no_indirects_mask(s, screen);
bool native_integers = screen->get_shader_param(screen,
pipe_shader_type_from_mesa(s->info.stage),
PIPE_SHADER_CAP_INTEGERS);
bool native_integers = screen->shader_caps[pipe_shader_type_from_mesa(s->info.stage)].integers;
const struct nir_shader_compiler_options *original_options = s->options;
ntt_fix_nir_options(screen, s, options);
@ -3966,9 +3961,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
NIR_PASS_V(s, nir_opt_combine_barriers, NULL, NULL);
if (screen->get_shader_param(screen,
pipe_shader_type_from_mesa(s->info.stage),
PIPE_SHADER_CAP_INTEGERS)) {
if (screen->shader_caps[pipe_shader_type_from_mesa(s->info.stage)].integers) {
NIR_PASS_V(s, nir_lower_bool_to_int32);
} else {
NIR_PASS_V(s, nir_lower_int_to_float);

2
src/gallium/auxiliary/nir/tgsi_to_nir.c
View file

@ -2215,7 +2215,7 @@ ttn_read_pipe_caps(struct ttn_compile *c,
c->cap_face_is_sysval = screen->caps.fs_face_is_integer_sysval;
c->cap_position_is_sysval = screen->caps.fs_position_is_sysval;
c->cap_point_is_sysval = screen->caps.fs_point_is_sysval;
c->cap_integers = screen->get_shader_param(screen, c->scan->processor, PIPE_SHADER_CAP_INTEGERS);
c->cap_integers = screen->shader_caps[c->scan->processor].integers;
c->cap_tg4_component_in_swizzle =
screen->caps.tgsi_tg4_component_in_swizzle;
}

3
src/gallium/auxiliary/tgsi/tgsi_ureg.c
View file

@ -2244,8 +2244,7 @@ ureg_create_with_screen(enum pipe_shader_type processor,
ureg->processor = processor;
ureg->supports_any_inout_decl_range =
screen &&
screen->get_shader_param(screen, processor,
PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE) != 0;
screen->shader_caps[processor].tgsi_any_inout_decl_range;
ureg->next_shader_processor = -1;
for (i = 0; i < ARRAY_SIZE(ureg->properties); i++)

6
src/gallium/auxiliary/util/u_blitter.c
View file

@ -194,12 +194,10 @@ struct blitter_context *util_blitter_create(struct pipe_context *pipe)
ctx->base.saved_num_so_targets = ~0;
ctx->has_geometry_shader =
pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_GEOMETRY,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0;
pipe->screen->shader_caps[PIPE_SHADER_GEOMETRY].max_instructions > 0;
ctx->has_tessellation =
pipe->screen->get_shader_param(pipe->screen, PIPE_SHADER_TESS_CTRL,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0;
pipe->screen->shader_caps[PIPE_SHADER_TESS_CTRL].max_instructions > 0;
ctx->has_stream_out = pipe->screen->caps.max_stream_output_buffers != 0;

9
src/gallium/auxiliary/util/u_screen.c
View file

@ -163,8 +163,7 @@ u_init_pipe_screen_caps(struct pipe_screen *pscreen, int accel)
caps->allow_dynamic_vao_fastpath = true;
caps->max_constant_buffer_size =
pscreen->get_shader_param(pscreen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE);
pscreen->shader_caps[PIPE_SHADER_FRAGMENT].max_const_buffer0_size;
/* accel=0: on CPU, always disabled
* accel>0: on GPU, enable by default, user can disable it manually
@ -173,11 +172,9 @@ u_init_pipe_screen_caps(struct pipe_screen *pscreen, int accel)
caps->hardware_gl_select =
!!accel && debug_get_bool_option("MESA_HW_ACCEL_SELECT", accel > 0) &&
/* internal geometry shader need indirect array access */
pscreen->get_shader_param(pscreen, PIPE_SHADER_GEOMETRY,
PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR) &&
pscreen->shader_caps[PIPE_SHADER_GEOMETRY].indirect_temp_addr &&
/* internal geometry shader need SSBO support */
pscreen->get_shader_param(pscreen, PIPE_SHADER_GEOMETRY,
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS);
pscreen->shader_caps[PIPE_SHADER_GEOMETRY].max_shader_buffers;
caps->query_timestamp_bits = 64;

12
src/gallium/auxiliary/util/u_threaded_context.c
View file

@ -5303,17 +5303,13 @@ threaded_context_create(struct pipe_context *pipe,
/* If you have different limits in each shader stage, set the maximum. */
struct pipe_screen *screen = pipe->screen;;
tc->max_const_buffers =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_const_buffers;
tc->max_shader_buffers =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_shader_buffers;
tc->max_images =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_SHADER_IMAGES);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_shader_images;
tc->max_samplers =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_texture_samplers;
tc->base.set_context_param = tc_set_context_param; /* always set this */

3
src/gallium/auxiliary/vl/vl_bicubic_filter.c
View file

@ -161,8 +161,7 @@ create_frag_shader(struct vl_bicubic_filter *filter, unsigned video_width,
struct ureg_dst t;
unsigned i;
if (screen->get_shader_param(
screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_TEMPS) < 23) {
if (screen->shader_caps[PIPE_SHADER_FRAGMENT].max_temps < 23) {
return NULL;
}

3
src/gallium/auxiliary/vl/vl_median_filter.c
View file

@ -92,8 +92,7 @@ create_frag_shader(struct vl_median_filter *filter,
return NULL;
}
if (num_offsets > screen->get_shader_param(
screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_TEMPS)) {
if (num_offsets > screen->shader_caps[PIPE_SHADER_FRAGMENT].max_temps) {
FREE(t_array);
return NULL;

5
src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
View file

@ -968,10 +968,7 @@ init_idct(struct vl_mpeg12_decoder *dec, const struct format_config* format_conf
nr_of_idct_render_targets = dec->context->screen->caps.max_render_targets;
max_inst = dec->context->screen->get_shader_param
(
dec->context->screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_INSTRUCTIONS
);
max_inst = dec->context->screen->shader_caps[PIPE_SHADER_FRAGMENT].max_instructions;
// Just assume we need 32 inst per render target, not 100% true, but should work in most cases
if (nr_of_idct_render_targets >= 4 && max_inst >= 32*4)

24
src/gallium/frontends/clover/core/device.cpp
View file

@ -231,14 +231,12 @@ device::vendor_id() const {
size_t
device::max_images_read() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].max_sampler_views;
}
size_t
device::max_images_write() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_MAX_SHADER_IMAGES);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].max_shader_images;
}
size_t
@ -263,8 +261,7 @@ device::max_image_array_number() const {
cl_uint
device::max_samplers() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].max_texture_samplers;
}
cl_ulong
@ -287,14 +284,12 @@ device::max_mem_input() const {
cl_ulong
device::max_const_buffer_size() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].max_const_buffer0_size;
}
cl_uint
device::max_const_buffers() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].max_const_buffers;
}
size_t
@ -359,14 +354,12 @@ device::has_doubles() const {
bool
device::has_halves() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_FP16);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].fp16;
}
bool
device::has_int64_atomics() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_INT64_ATOMICS);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].int64_atomics;
}
bool
@ -488,8 +481,7 @@ device::device_clc_version_as_string() const {
bool
device::supports_ir(enum pipe_shader_ir ir) const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_SUPPORTED_IRS) & (1 << ir);
return pipe->shader_caps[PIPE_SHADER_COMPUTE].supported_irs & (1 << ir);
}
std::vector<cl_name_version>

16
src/gallium/frontends/lavapipe/lvp_device.c
View file

@ -340,8 +340,8 @@ lvp_get_features(const struct lvp_physical_device *pdevice,
.fullDrawIndexUint32 = true,
.imageCubeArray = (pdevice->pscreen->caps.cube_map_array != 0),
.independentBlend = true,
.geometryShader = (pdevice->pscreen->get_shader_param(pdevice->pscreen, MESA_SHADER_GEOMETRY, PIPE_SHADER_CAP_MAX_INSTRUCTIONS) != 0),
.tessellationShader = (pdevice->pscreen->get_shader_param(pdevice->pscreen, MESA_SHADER_TESS_EVAL, PIPE_SHADER_CAP_MAX_INSTRUCTIONS) != 0),
.geometryShader = (pdevice->pscreen->shader_caps[MESA_SHADER_GEOMETRY].max_instructions != 0),
.tessellationShader = (pdevice->pscreen->shader_caps[MESA_SHADER_TESS_EVAL].max_instructions != 0),
.sampleRateShading = (pdevice->pscreen->caps.sample_shading != 0),
.dualSrcBlend = (pdevice->pscreen->caps.max_dual_source_render_targets != 0),
.logicOp = true,
@ -362,7 +362,7 @@ lvp_get_features(const struct lvp_physical_device *pdevice,
.occlusionQueryPrecise = true,
.pipelineStatisticsQuery = true,
.vertexPipelineStoresAndAtomics = (MIN_VERTEX_PIPELINE_CAP(pdevice->pscreen, max_shader_buffers) != 0),
.fragmentStoresAndAtomics = (pdevice->pscreen->get_shader_param(pdevice->pscreen, MESA_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_SHADER_BUFFERS) != 0),
.fragmentStoresAndAtomics = (pdevice->pscreen->shader_caps[MESA_SHADER_FRAGMENT].max_shader_buffers != 0),
.shaderTessellationAndGeometryPointSize = true,
.shaderImageGatherExtended = true,
.shaderStorageImageExtendedFormats = (MIN_SHADER_CAP(pdevice->pscreen, max_shader_images) != 0),
@ -409,7 +409,7 @@ lvp_get_features(const struct lvp_physical_device *pdevice,
.storagePushConstant8 = true,
.shaderBufferInt64Atomics = true,
.shaderSharedInt64Atomics = true,
.shaderFloat16 = pdevice->pscreen->get_shader_param(pdevice->pscreen, MESA_SHADER_FRAGMENT, PIPE_SHADER_CAP_FP16) != 0,
.shaderFloat16 = pdevice->pscreen->shader_caps[MESA_SHADER_FRAGMENT].fp16,
.shaderInt8 = true,
.descriptorIndexing = true,
@ -867,10 +867,8 @@ lvp_get_properties(const struct lvp_physical_device *device, struct vk_propertie
.maxFragmentOutputAttachments = 8,
.maxFragmentDualSrcAttachments = 2,
.maxFragmentCombinedOutputResources = max_render_targets +
device->pscreen->get_shader_param(device->pscreen, MESA_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS) +
device->pscreen->get_shader_param(device->pscreen, MESA_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_SHADER_IMAGES),
device->pscreen->shader_caps[MESA_SHADER_FRAGMENT].max_shader_buffers +
device->pscreen->shader_caps[MESA_SHADER_FRAGMENT].max_shader_images,
.maxComputeSharedMemorySize = max_local_size,
.maxComputeWorkGroupCount = { grid_size[0], grid_size[1], grid_size[2] },
.maxComputeWorkGroupInvocations = max_threads_per_block,
@ -1295,7 +1293,7 @@ lvp_physical_device_init(struct lvp_physical_device *device,
device->sync_types[2] = NULL;
device->vk.supported_sync_types = device->sync_types;
device->max_images = device->pscreen->get_shader_param(device->pscreen, MESA_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_SHADER_IMAGES);
device->max_images = device->pscreen->shader_caps[MESA_SHADER_FRAGMENT].max_shader_images;
device->vk.supported_extensions = lvp_device_extensions_supported;
#ifdef HAVE_LIBDRM
int dmabuf_bits = DRM_PRIME_CAP_EXPORT | DRM_PRIME_CAP_IMPORT;

80
src/gallium/frontends/nine/adapter9.c
View file

@ -57,33 +57,22 @@ NineAdapter9_ctor( struct NineAdapter9 *This,
/* checks minimum requirements, most are vs3/ps3 strict requirements */
if (!has_sm3(hal) ||
hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) < 256 * sizeof(float[4]) ||
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) < 244 * sizeof(float[4]) ||
hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEMPS) < 32 ||
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEMPS) < 32 ||
hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_INPUTS) < 16 ||
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_INPUTS) < 10 ||
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS) < 16) {
hal->shader_caps[PIPE_SHADER_VERTEX].max_const_buffer0_size < 256 * sizeof(float[4]) ||
hal->shader_caps[PIPE_SHADER_FRAGMENT].max_const_buffer0_size < 244 * sizeof(float[4]) ||
hal->shader_caps[PIPE_SHADER_VERTEX].max_temps < 32 ||
hal->shader_caps[PIPE_SHADER_FRAGMENT].max_temps < 32 ||
hal->shader_caps[PIPE_SHADER_VERTEX].max_inputs < 16 ||
hal->shader_caps[PIPE_SHADER_FRAGMENT].max_inputs < 10 ||
hal->shader_caps[PIPE_SHADER_FRAGMENT].max_texture_samplers < 16) {
ERR("Your device is not supported by Gallium Nine. Minimum requirement "
"is >= r500, >= nv50, >= i965\n");
return D3DERR_DRIVERINTERNALERROR;
}
/* for r500 */
if (hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) < 276 * sizeof(float[4]) || /* we put bool and int constants with float constants */
hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEMPS) < 40 || /* we use some more temp registers */
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEMPS) < 40 ||
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_INPUTS) < 20) /* we don't pack inputs as much as we could */
if (hal->shader_caps[PIPE_SHADER_VERTEX].max_const_buffer0_size < 276 * sizeof(float[4]) || /* we put bool and int constants with float constants */
hal->shader_caps[PIPE_SHADER_VERTEX].max_temps < 40 || /* we use some more temp registers */
hal->shader_caps[PIPE_SHADER_FRAGMENT].max_temps < 40 ||
hal->shader_caps[PIPE_SHADER_FRAGMENT].max_inputs < 20) /* we don't pack inputs as much as we could */
WARN_ONCE("Your device is at the limit of Gallium Nine requirements. Some games "
"may run into issues because requirements are too tight\n");
return D3D_OK;
@ -323,7 +312,7 @@ NineAdapter9_CheckDeviceFormat( struct NineAdapter9 *This,
}
if ((Usage & D3DUSAGE_QUERY_VERTEXTEXTURE) &&
!screen->get_shader_param(screen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS))
!screen->shader_caps[PIPE_SHADER_VERTEX].max_texture_samplers)
return D3DERR_NOTAVAILABLE;
/* API hack because setting RT[0] to NULL is forbidden */
@ -836,8 +825,7 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
pCaps->MaxPrimitiveCount = 0x555555; /* <- wine, really 0xFFFFFFFF; */
pCaps->MaxVertexIndex = 0xFFFFFF; /* <- wine, really 0xFFFFFFFF */
pCaps->MaxStreams =
_min(screen->get_shader_param(screen,
PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_MAX_INPUTS),
_min(screen->shader_caps[PIPE_SHADER_VERTEX].max_inputs,
16);
pCaps->MaxStreamStride = screen->caps.max_vertex_attrib_stride;
@ -896,14 +884,11 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
pCaps->VS20Caps.Caps = D3DVS20CAPS_PREDICATION;
pCaps->VS20Caps.DynamicFlowControlDepth = /* XXX is this dynamic ? */
screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH);
screen->shader_caps[PIPE_SHADER_VERTEX].max_control_flow_depth;
pCaps->VS20Caps.NumTemps =
screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEMPS);
screen->shader_caps[PIPE_SHADER_VERTEX].max_temps;
pCaps->VS20Caps.StaticFlowControlDepth = /* XXX is this static ? */
screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH);
screen->shader_caps[PIPE_SHADER_VERTEX].max_control_flow_depth;
/* also check for values < 0, because get_shader_param may return unsigned */
if (pCaps->VS20Caps.DynamicFlowControlDepth > D3DVS20_MAX_DYNAMICFLOWCONTROLDEPTH
@ -922,28 +907,20 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
pCaps->PS20Caps.Caps = D3DPS20CAPS_ARBITRARYSWIZZLE |
D3DPS20CAPS_GRADIENTINSTRUCTIONS |
D3DPS20CAPS_PREDICATION;
if (screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS) ==
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS))
if (screen->shader_caps[PIPE_SHADER_FRAGMENT].max_tex_instructions ==
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_instructions)
pCaps->PS20Caps.Caps |= D3DPS20CAPS_NOTEXINSTRUCTIONLIMIT;
if (screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS) ==
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS))
if (screen->shader_caps[PIPE_SHADER_FRAGMENT].max_tex_instructions ==
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_tex_indirections)
pCaps->PS20Caps.Caps |= D3DPS20CAPS_NODEPENDENTREADLIMIT;
pCaps->PS20Caps.DynamicFlowControlDepth = /* XXX is this dynamic ? */
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_control_flow_depth;
pCaps->PS20Caps.NumTemps =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEMPS);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_temps;
pCaps->PS20Caps.StaticFlowControlDepth = /* XXX is this static ? */
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_control_flow_depth;
pCaps->PS20Caps.NumInstructionSlots =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_instructions;
if (pCaps->PS20Caps.DynamicFlowControlDepth > D3DPS20_MAX_DYNAMICFLOWCONTROLDEPTH
|| pCaps->PS20Caps.DynamicFlowControlDepth < 0)
@ -961,8 +938,7 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
assert(pCaps->PS20Caps.NumInstructionSlots >= D3DPS20_MIN_NUMINSTRUCTIONSLOTS);
if (screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS))
if (screen->shader_caps[PIPE_SHADER_VERTEX].max_texture_samplers)
pCaps->VertexTextureFilterCaps = pCaps->TextureFilterCaps &
~(D3DPTFILTERCAPS_MIPFPOINT |
D3DPTFILTERCAPS_MIPFPOINT); /* XXX */
@ -970,11 +946,9 @@ NineAdapter9_GetDeviceCaps( struct NineAdapter9 *This,
pCaps->VertexTextureFilterCaps = 0;
pCaps->MaxVertexShader30InstructionSlots =
screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS);
screen->shader_caps[PIPE_SHADER_VERTEX].max_instructions;
pCaps->MaxPixelShader30InstructionSlots =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS);
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_instructions;
if (pCaps->MaxVertexShader30InstructionSlots > D3DMAX30SHADERINSTRUCTIONS)
pCaps->MaxVertexShader30InstructionSlots = D3DMAX30SHADERINSTRUCTIONS;
if (pCaps->MaxPixelShader30InstructionSlots > D3DMAX30SHADERINSTRUCTIONS)

13
src/gallium/frontends/nine/device9.c
View file

@ -223,11 +223,9 @@ NineDevice9_ctor( struct NineDevice9 *This,
/* TODO: check if swvp is reset by device Resets */
if (This->may_swvp &&
(This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE)
(This->screen->shader_caps[PIPE_SHADER_VERTEX].max_const_buffer0_size
< (NINE_MAX_CONST_F_SWVP/2) * sizeof(float[4]) ||
This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS) < 5)) {
This->screen->shader_caps[PIPE_SHADER_VERTEX].max_const_buffers < 5)) {
/* Note: We just go on, some apps never use the abilities of
* swvp, and just set more constants than allowed at init.
* Only cards we support that are affected are the r500 */
@ -447,8 +445,7 @@ NineDevice9_ctor( struct NineDevice9 *This,
/* vs 3.0: >= 256 float constants, but for cards with exactly 256 slots,
* we have to take in some more slots for int and bool*/
max_const_vs = _min(pScreen->get_shader_param(pScreen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) /
max_const_vs = _min(pScreen->shader_caps[PIPE_SHADER_VERTEX].max_const_buffer0_size /
sizeof(float[4]),
NINE_MAX_CONST_ALL_VS);
/* ps 3.0: 224 float constants. All cards supported support at least
@ -559,8 +556,8 @@ NineDevice9_ctor( struct NineDevice9 *This,
This->vertex_uploader = This->csmt_active ? This->pipe_secondary->stream_uploader : This->context.pipe->stream_uploader;
This->driver_caps.window_space_position_support = GET_PCAP(vs_window_space_position);
This->driver_caps.disabling_depth_clipping_support = GET_PCAP(depth_clip_disable);
This->driver_caps.vs_integer = pScreen->get_shader_param(pScreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS);
This->driver_caps.ps_integer = pScreen->get_shader_param(pScreen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS);
This->driver_caps.vs_integer = pScreen->shader_caps[PIPE_SHADER_VERTEX].integers;
This->driver_caps.ps_integer = pScreen->shader_caps[PIPE_SHADER_FRAGMENT].integers;
This->driver_caps.offset_units_unscaled = GET_PCAP(polygon_offset_units_unscaled);
This->driver_caps.alpha_test_emulation = !GET_PCAP(alpha_test);
/* Always write pointsize output when the driver doesn't support point_size_per_vertex = 0.

3
src/mesa/state_tracker/st_context.c
View file

@ -629,8 +629,7 @@ st_create_context_priv(struct gl_context *ctx, struct pipe_context *pipe,
screen->caps.call_finalize_nir_in_linker;
st->has_hw_atomics =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS)
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_hw_atomic_counters
? true : false;
st->validate_all_dirty_states =

88
src/mesa/state_tracker/st_extensions.c
View file

@ -219,29 +219,24 @@ void st_init_limits(struct pipe_screen *screen,
}
pc->MaxTextureImageUnits =
_min(screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS),
_min(screen->shader_caps[sh].max_texture_samplers,
MAX_TEXTURE_IMAGE_UNITS);
pc->MaxInstructions =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_INSTRUCTIONS);
screen->shader_caps[sh].max_instructions;
pc->MaxAluInstructions =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS);
screen->shader_caps[sh].max_alu_instructions;
pc->MaxTexInstructions =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS);
screen->shader_caps[sh].max_tex_instructions;
pc->MaxTexIndirections =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS);
screen->shader_caps[sh].max_tex_indirections;
pc->MaxAttribs =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_INPUTS);
screen->shader_caps[sh].max_inputs;
pc->MaxTemps =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_TEMPS);
screen->shader_caps[sh].max_temps;
pc->MaxUniformComponents =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) / 4;
screen->shader_caps[sh].max_const_buffer0_size / 4;
/* reserve space in the default-uniform for lowered state */
if (sh == PIPE_SHADER_VERTEX ||
@ -269,14 +264,13 @@ void st_init_limits(struct pipe_screen *screen,
*/
pc->MaxParameters = MIN2(pc->MaxUniformComponents / 4, 2048);
pc->MaxInputComponents =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_INPUTS) * 4;
screen->shader_caps[sh].max_inputs * 4;
pc->MaxOutputComponents =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_OUTPUTS) * 4;
screen->shader_caps[sh].max_outputs * 4;
pc->MaxUniformBlocks =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS);
screen->shader_caps[sh].max_const_buffers;
if (pc->MaxUniformBlocks)
pc->MaxUniformBlocks -= 1; /* The first one is for ordinary uniforms. */
pc->MaxUniformBlocks = _min(pc->MaxUniformBlocks, MAX_UNIFORM_BUFFERS);
@ -286,17 +280,16 @@ void st_init_limits(struct pipe_screen *screen,
(uint64_t)c->MaxUniformBlockSize / 4 * pc->MaxUniformBlocks;
pc->MaxShaderStorageBlocks =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS);
screen->shader_caps[sh].max_shader_buffers;
temp = screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS);
temp = screen->shader_caps[sh].max_hw_atomic_counters;
if (temp) {
/*
* for separate atomic counters get the actual hw limits
* per stage on atomic counters and buffers
*/
pc->MaxAtomicCounters = temp;
pc->MaxAtomicBuffers = screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS);
pc->MaxAtomicBuffers = screen->shader_caps[sh].max_hw_atomic_counter_buffers;
} else if (pc->MaxShaderStorageBlocks) {
pc->MaxAtomicCounters = MAX_ATOMIC_COUNTERS;
/*
@ -307,8 +300,7 @@ void st_init_limits(struct pipe_screen *screen,
pc->MaxShaderStorageBlocks -= pc->MaxAtomicBuffers;
}
pc->MaxImageUniforms =
_min(screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_SHADER_IMAGES),
_min(screen->shader_caps[sh].max_shader_images,
MAX_IMAGE_UNIFORMS);
/* Gallium doesn't really care about local vs. env parameters so use the
@ -317,20 +309,20 @@ void st_init_limits(struct pipe_screen *screen,
pc->MaxLocalParams = MIN2(pc->MaxParameters, MAX_PROGRAM_LOCAL_PARAMS);
pc->MaxEnvParams = MIN2(pc->MaxParameters, MAX_PROGRAM_ENV_PARAMS);
if (screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_INTEGERS)) {
if (screen->shader_caps[sh].integers) {
pc->LowInt.RangeMin = 31;
pc->LowInt.RangeMax = 30;
pc->LowInt.Precision = 0;
pc->MediumInt = pc->HighInt = pc->LowInt;
if (screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_INT16)) {
if (screen->shader_caps[sh].int16) {
pc->LowInt.RangeMin = 15;
pc->LowInt.RangeMax = 14;
pc->MediumInt = pc->LowInt;
}
}
if (screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_FP16)) {
if (screen->shader_caps[sh].fp16) {
pc->LowFloat.RangeMin = 15;
pc->LowFloat.RangeMax = 15;
pc->LowFloat.Precision = 10;
@ -339,22 +331,18 @@ void st_init_limits(struct pipe_screen *screen,
/* TODO: make these more fine-grained if anyone needs it */
options->MaxIfDepth =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH);
screen->shader_caps[sh].max_control_flow_depth;
options->EmitNoMainReturn =
!screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_SUBROUTINES);
!screen->shader_caps[sh].subroutines;
options->EmitNoCont =
!screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_CONT_SUPPORTED);
!screen->shader_caps[sh].cont_supported;
options->EmitNoIndirectTemp =
!screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR);
!screen->shader_caps[sh].indirect_temp_addr;
options->EmitNoIndirectUniform =
!screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_INDIRECT_CONST_ADDR);
!screen->shader_caps[sh].indirect_const_addr;
if (pc->MaxInstructions &&
(options->EmitNoIndirectUniform || pc->MaxUniformBlocks < 12)) {
@ -369,15 +357,15 @@ void st_init_limits(struct pipe_screen *screen,
}
options->LowerPrecisionFloat16 =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_FP16);
screen->shader_caps[sh].fp16;
options->LowerPrecisionDerivatives =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_FP16_DERIVATIVES);
screen->shader_caps[sh].fp16_derivatives;
options->LowerPrecisionInt16 =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_INT16);
screen->shader_caps[sh].int16;
options->LowerPrecisionConstants =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_GLSL_16BIT_CONSTS);
screen->shader_caps[sh].glsl_16bit_consts;
options->LowerPrecisionFloat16Uniforms =
screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_FP16_CONST_BUFFERS);
screen->shader_caps[sh].fp16_const_buffers;
}
c->MaxUserAssignableUniformLocations =
@ -1285,10 +1273,8 @@ void st_init_extensions(struct pipe_screen *screen,
}
} else {
/* Optional integer support for GLSL 1.2. */
if (screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_INTEGERS) &&
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_INTEGERS)) {
if (screen->shader_caps[PIPE_SHADER_VERTEX].integers &&
screen->shader_caps[PIPE_SHADER_FRAGMENT].integers) {
consts->NativeIntegers = GL_TRUE;
extensions->EXT_shader_integer_mix = GL_TRUE;
@ -1315,16 +1301,14 @@ void st_init_extensions(struct pipe_screen *screen,
/* Below are the cases which cannot be moved into tables easily. */
/* The compatibility profile also requires GLSLVersionCompat >= 400. */
if (screen->get_shader_param(screen, PIPE_SHADER_TESS_CTRL,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0 &&
if (screen->shader_caps[PIPE_SHADER_TESS_CTRL].max_instructions > 0 &&
(api != API_OPENGL_COMPAT || consts->GLSLVersionCompat >= 400)) {
extensions->ARB_tessellation_shader = GL_TRUE;
}
/* OES_geometry_shader requires instancing */
if ((GLSLVersion >= 400 || ESSLVersion >= 310) &&
screen->get_shader_param(screen, PIPE_SHADER_GEOMETRY,
PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0 &&
screen->shader_caps[PIPE_SHADER_GEOMETRY].max_instructions > 0 &&
consts->MaxGeometryShaderInvocations >= 32) {
extensions->OES_geometry_shader = GL_TRUE;
}
@ -1556,8 +1540,7 @@ void st_init_extensions(struct pipe_screen *screen,
* prefer to disable varying packing rather than run the risk of varying
* packing preventing a shader from running.
*/
if (screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS) <= 8) {
if (screen->shader_caps[PIPE_SHADER_FRAGMENT].max_tex_indirections <= 8) {
/* We can't disable varying packing if transform feedback is available,
* because transform feedback code assumes a packed varying layout.
*/
@ -1622,8 +1605,7 @@ void st_init_extensions(struct pipe_screen *screen,
extensions->ARB_uniform_buffer_object &&
(extensions->NV_primitive_restart ||
consts->PrimitiveRestartFixedIndex) &&
screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS) >= 16 &&
screen->shader_caps[PIPE_SHADER_VERTEX].max_texture_samplers >= 16 &&
/* Requirements for ETC2 emulation. */
screen->is_format_supported(screen, PIPE_FORMAT_R8G8B8A8_UNORM,
PIPE_TEXTURE_2D, 0, 0,
@ -1851,7 +1833,7 @@ void st_init_extensions(struct pipe_screen *screen,
const struct nir_shader_compiler_options *nir_options =
consts->ShaderCompilerOptions[MESA_SHADER_FRAGMENT].NirOptions;
if (screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS) &&
if (screen->shader_caps[PIPE_SHADER_FRAGMENT].integers &&
extensions->ARB_stencil_texturing &&
screen->caps.doubles &&
!(nir_options->lower_doubles_options & nir_lower_fp64_full_software))

5
src/mesa/state_tracker/st_pbo.c
View file

@ -642,7 +642,7 @@ st_init_pbo_helpers(struct st_context *st)
st->pbo.upload_enabled =
screen->caps.texture_buffer_objects &&
screen->caps.texture_buffer_offset_alignment >= 1 &&
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_INTEGERS);
screen->shader_caps[PIPE_SHADER_FRAGMENT].integers;
if (!st->pbo.upload_enabled)
return;
@ -650,8 +650,7 @@ st_init_pbo_helpers(struct st_context *st)
st->pbo.upload_enabled &&
screen->caps.sampler_view_target &&
screen->caps.framebuffer_no_attachment &&
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_SHADER_IMAGES) >= 1;
screen->shader_caps[PIPE_SHADER_FRAGMENT].max_shader_images >= 1;
st->pbo.rgba_only =
screen->caps.buffer_sampler_view_rgba_only;