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cell: Use unified data cache for textures too
This commit is contained in:
Ian Romanick
parent
cc5ffd7622
commit
1c50ea2cd9
3 changed files with 69 additions and 114 deletions
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@ -286,6 +286,8 @@ cmd_state_texture(const struct cell_command_texture *texture)
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{ spu.texture.width, spu.texture.height, 0.0, 0.0};
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spu.tex_size_mask = (vector unsigned int)
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{ spu.texture.width - 1, spu.texture.height - 1, 0, 0 };
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spu.tex_size_x_mask = spu_splats(spu.texture.width - 1);
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spu.tex_size_y_mask = spu_splats(spu.texture.height - 1);
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}
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@ -107,6 +107,8 @@ struct spu_global
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vector float tex_size;
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vector unsigned int tex_size_mask; /**< == int(size - 1) */
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vector unsigned int tex_size_x_mask; /**< == int(size - 1) */
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vector unsigned int tex_size_y_mask; /**< == int(size - 1) */
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vector float (*sample_texture)(vector float texcoord);
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@ -130,7 +132,6 @@ extern boolean Debug;
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#define TAG_INDEX_BUFFER 16
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#define TAG_BATCH_BUFFER 17
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#define TAG_MISC 18
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#define TAG_TEXTURE_TILE 19
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#define TAG_DCACHE0 20
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#define TAG_DCACHE1 21
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#define TAG_DCACHE2 22
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@ -31,19 +31,7 @@
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#include "spu_texture.h"
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#include "spu_tile.h"
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#include "spu_colorpack.h"
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/**
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* Number of texture tiles to cache.
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* Note that this will probably be the largest consumer of SPU local store/
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* memory for this driver!
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*/
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#define CACHE_SIZE 16
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static tile_t tex_tiles[CACHE_SIZE] ALIGN16_ATTRIB;
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static vector unsigned int tex_tile_xy[CACHE_SIZE];
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#include "spu_dcache.h"
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/**
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@ -52,78 +40,60 @@ static vector unsigned int tex_tile_xy[CACHE_SIZE];
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void
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invalidate_tex_cache(void)
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{
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/* XXX memset? */
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uint i;
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for (i = 0; i < CACHE_SIZE; i++) {
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tex_tile_xy[i] = ((vector unsigned int) { ~0U, ~0U, ~0U, ~0U });
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}
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spu_dcache_mark_dirty((unsigned) spu.texture.start,
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4 * spu.texture.width * spu.texture.height);
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}
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/**
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* Return the cache pos/index which corresponds to tile (tx,ty)
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*/
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static INLINE uint
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cache_pos(vector unsigned int txty)
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{
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uint pos = (spu_extract(txty,0) + spu_extract(txty,1) * 4) % CACHE_SIZE;
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return pos;
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}
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/**
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* Make sure the tile for texel (i,j) is present, return its position/index
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* in the cache.
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*/
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static uint
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get_tex_tile(vector unsigned int ij)
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get_texel(vec_uint4 coordinate)
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{
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/* tile address: tx,ty */
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const vector unsigned int txty = spu_rlmask(ij, -5); /* divide by 32 */
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const uint pos = cache_pos(txty);
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vec_uint4 tmp;
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unsigned x = spu_extract(coordinate, 0);
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unsigned y = spu_extract(coordinate, 1);
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const unsigned tiles_per_row = spu.texture.width / TILE_SIZE;
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unsigned tile_offset = sizeof(tile_t) * ((y / TILE_SIZE * tiles_per_row)
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+ (x / TILE_SIZE));
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unsigned texel_offset = 4 * (((y % TILE_SIZE) * TILE_SIZE)
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+ (x % TILE_SIZE));
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if ((spu_extract(tex_tile_xy[pos], 0) != spu_extract(txty, 0)) ||
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(spu_extract(tex_tile_xy[pos], 1) != spu_extract(txty, 1))) {
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/* texture cache miss, fetch tile from main memory */
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const uint tiles_per_row = spu.texture.width / TILE_SIZE;
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const uint bytes_per_tile = sizeof(tile_t);
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const void *src = (const ubyte *) spu.texture.start
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+ (spu_extract(txty,1) * tiles_per_row + spu_extract(txty,0)) * bytes_per_tile;
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printf("SPU %u: tex cache miss at %d, %d pos=%u old=%d,%d\n",
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spu.init.id,
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spu_extract(txty,0),
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spu_extract(txty,1),
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pos,
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spu_extract(tex_tile_xy[pos],0),
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spu_extract(tex_tile_xy[pos],1));
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ASSERT_ALIGN16(tex_tiles[pos].ui);
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ASSERT_ALIGN16(src);
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mfc_get(tex_tiles[pos].ui, /* dest */
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(unsigned int) src,
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bytes_per_tile, /* size */
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TAG_TEXTURE_TILE,
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0, /* tid */
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0 /* rid */);
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wait_on_mask(1 << TAG_TEXTURE_TILE);
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tex_tile_xy[pos] = txty;
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}
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else {
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#if 0
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printf("SPU %u: tex cache HIT at %d, %d\n",
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spu.init.id, tx, ty);
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#endif
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}
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return pos;
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spu_dcache_fetch_unaligned((qword *) & tmp,
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spu.texture.start + tile_offset + texel_offset,
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4);
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return spu_extract(tmp, 0);
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}
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static void
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get_four_texels(vec_uint4 x, vec_uint4 y, vec_uint4 *texels)
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{
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const unsigned texture_ea = (uintptr_t) spu.texture.start;
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vec_uint4 tile_x = spu_rlmask(x, -5);
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vec_uint4 tile_y = spu_rlmask(y, -5);
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const qword offset_x = si_andi((qword) x, 0x1f);
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const qword offset_y = si_andi((qword) y, 0x1f);
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const qword tiles_per_row = (qword) spu_splats(spu.texture.width / TILE_SIZE);
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const qword tile_size = (qword) spu_splats(sizeof(tile_t));
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qword tile_offset = si_mpya((qword) tile_y, tiles_per_row, (qword) tile_x);
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tile_offset = si_mpy((qword) tile_offset, tile_size);
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qword texel_offset = si_a(si_mpyui(offset_y, 32), offset_x);
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texel_offset = si_mpyui(texel_offset, 4);
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vec_uint4 offset = (vec_uint4) si_a(tile_offset, texel_offset);
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spu_dcache_fetch_unaligned((qword *) & texels[0],
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texture_ea + spu_extract(offset, 0), 4);
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spu_dcache_fetch_unaligned((qword *) & texels[1],
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texture_ea + spu_extract(offset, 1), 4);
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spu_dcache_fetch_unaligned((qword *) & texels[2],
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texture_ea + spu_extract(offset, 2), 4);
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spu_dcache_fetch_unaligned((qword *) & texels[3],
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texture_ea + spu_extract(offset, 3), 4);
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}
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/**
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* Get texture sample at texcoord.
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* XXX this is extremely primitive for now.
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@ -134,9 +104,7 @@ sample_texture_nearest(vector float texcoord)
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vector float tc = spu_mul(texcoord, spu.tex_size);
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vector unsigned int itc = spu_convtu(tc, 0); /* convert to int */
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itc = spu_and(itc, spu.tex_size_mask); /* mask (GL_REPEAT) */
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vector unsigned int ij = spu_and(itc, TILE_SIZE-1); /* intra tile addr */
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uint pos = get_tex_tile(itc);
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uint texel = tex_tiles[pos].ui[spu_extract(ij, 1)][spu_extract(ij, 0)];
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uint texel = get_texel(itc);
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return spu_unpack_A8R8G8B8(texel);
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}
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@ -144,49 +112,33 @@ sample_texture_nearest(vector float texcoord)
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vector float
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sample_texture_bilinear(vector float texcoord)
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{
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static const vector unsigned int offset10 = {1, 0, 0, 0};
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static const vector unsigned int offset01 = {0, 1, 0, 0};
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static const vec_uint4 offset_x = {0, 0, 1, 1};
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static const vec_uint4 offset_y = {0, 1, 0, 1};
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vector float tc = spu_mul(texcoord, spu.tex_size);
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tc = spu_add(tc, spu_splats(-0.5f)); /* half texel bias */
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/* integer texcoords S,T: */
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vector unsigned int itc00 = spu_convtu(tc, 0); /* convert to int */
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vector unsigned int itc01 = spu_add(itc00, offset01);
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vector unsigned int itc10 = spu_add(itc00, offset10);
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vector unsigned int itc11 = spu_add(itc10, offset01);
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vec_uint4 itc = spu_convtu(tc, 0); /* convert to int */
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/* mask (GL_REPEAT) */
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itc00 = spu_and(itc00, spu.tex_size_mask);
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itc01 = spu_and(itc01, spu.tex_size_mask);
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itc10 = spu_and(itc10, spu.tex_size_mask);
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itc11 = spu_and(itc11, spu.tex_size_mask);
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vec_uint4 texels[4];
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vec_uint4 x = spu_splats(spu_extract(itc, 0));
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vec_uint4 y = spu_splats(spu_extract(itc, 1));
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/* intra tile addr */
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vector unsigned int ij00 = spu_and(itc00, TILE_SIZE-1);
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vector unsigned int ij01 = spu_and(itc01, TILE_SIZE-1);
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vector unsigned int ij10 = spu_and(itc10, TILE_SIZE-1);
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vector unsigned int ij11 = spu_and(itc11, TILE_SIZE-1);
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x = spu_add(x, offset_x);
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y = spu_add(y, offset_y);
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/* get tile cache positions */
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uint pos00 = get_tex_tile(itc00);
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uint pos01, pos10, pos11;
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if ((spu_extract(ij00, 0) < TILE_SIZE-1) &&
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(spu_extract(ij00, 1) < TILE_SIZE-1)) {
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/* all texels are in the same tile */
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pos01 = pos10 = pos11 = pos00;
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}
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else {
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pos01 = get_tex_tile(itc01);
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pos10 = get_tex_tile(itc10);
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pos11 = get_tex_tile(itc11);
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}
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x = spu_and(x, spu.tex_size_x_mask);
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y = spu_and(y, spu.tex_size_y_mask);
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get_four_texels(x, y, texels);
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vector float texel00 = spu_unpack_A8R8G8B8(spu_extract(texels[0], 0));
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vector float texel01 = spu_unpack_A8R8G8B8(spu_extract(texels[1], 0));
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vector float texel10 = spu_unpack_A8R8G8B8(spu_extract(texels[2], 0));
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vector float texel11 = spu_unpack_A8R8G8B8(spu_extract(texels[3], 0));
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/* get texels from tiles and convert to float[4] */
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vector float texel00 = spu_unpack_A8R8G8B8(tex_tiles[pos00].ui[spu_extract(ij00, 1)][spu_extract(ij00, 0)]);
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vector float texel01 = spu_unpack_A8R8G8B8(tex_tiles[pos01].ui[spu_extract(ij01, 1)][spu_extract(ij01, 0)]);
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vector float texel10 = spu_unpack_A8R8G8B8(tex_tiles[pos10].ui[spu_extract(ij10, 1)][spu_extract(ij10, 0)]);
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vector float texel11 = spu_unpack_A8R8G8B8(tex_tiles[pos11].ui[spu_extract(ij11, 1)][spu_extract(ij11, 0)]);
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/* Compute weighting factors in [0,1]
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* Multiply texcoord by 1024, AND with 1023, convert back to float.
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