From 1bfe2571f53ac955e0c8655a0b20ccb12eb7eb88 Mon Sep 17 00:00:00 2001
From: Sagar Ghuge <sagar.ghuge@intel.com>
Date: Wed, 4 Oct 2023 15:39:48 -0700
Subject: [PATCH] intel/compiler: Lower sample index into coord for MSRT
 messages

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32690>
---
 src/intel/compiler/brw_nir.c                  |  3 +
 src/intel/compiler/brw_nir.h                  |  2 +
 .../brw_nir_lower_sample_index_in_coord.c     | 66 +++++++++++++++++++
 src/intel/compiler/meson.build                |  1 +
 4 files changed, 72 insertions(+)
 create mode 100644 src/intel/compiler/brw_nir_lower_sample_index_in_coord.c

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 81f7b81b3d0..62db1c290c7 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -1794,6 +1794,9 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
       OPT(nir_lower_idiv, &options);
    }
 
+   if (devinfo->ver >= 30)
+      NIR_PASS(_, nir, brw_nir_lower_sample_index_in_coord);
+
    if (gl_shader_stage_can_set_fragment_shading_rate(nir->info.stage))
       NIR_PASS(_, nir, intel_nir_lower_shading_rate_output);
 
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index f519bee21ae..c011d2d0e63 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -201,6 +201,8 @@ bool brw_nir_lower_texel_address(nir_shader *shader,
                                  const struct intel_device_info *devinfo,
                                  enum isl_tiling tiling);
 
+bool brw_nir_lower_sample_index_in_coord(nir_shader *nir);
+
 bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
                                         const struct
                                         intel_device_info *devinfo);
diff --git a/src/intel/compiler/brw_nir_lower_sample_index_in_coord.c b/src/intel/compiler/brw_nir_lower_sample_index_in_coord.c
new file mode 100644
index 00000000000..af043a2e18f
--- /dev/null
+++ b/src/intel/compiler/brw_nir_lower_sample_index_in_coord.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2015-2025 Intel Corporation
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "brw_nir.h"
+#include "compiler/nir/nir_builder.h"
+
+/* Put the sample index in the 4th component of coords since multisampled
+ * images don't support mipmapping.
+ */
+static bool
+lower_image_sample_index_in_coord(nir_builder *b,
+                                  nir_intrinsic_instr *intrin)
+{
+   b->cursor = nir_before_instr(&intrin->instr);
+
+   nir_def *coord = intrin->src[1].ssa;
+   nir_def *sample_index = intrin->src[2].ssa;
+
+   nir_def *new_coord;
+   if (nir_intrinsic_image_array(intrin)) {
+      new_coord = nir_vec4(b, nir_channel(b, coord, 0),
+                           nir_channel(b, coord, 1), nir_channel(b, coord, 2),
+                           sample_index);
+   } else {
+      new_coord = nir_vec4(b, nir_channel(b, coord, 0),
+                           nir_channel(b, coord, 1), nir_imm_int(b, 0),
+                           sample_index);
+   }
+
+   nir_src_rewrite(&intrin->src[1], new_coord);
+   return true;
+}
+
+static bool
+lower_image_sample_index_in_coord_instr(nir_builder *b,
+                                        nir_instr *instr,
+                                        void *cb_data)
+{
+   if (instr->type != nir_instr_type_intrinsic)
+      return false;
+
+   nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
+
+   switch (intrin->intrinsic) {
+   case nir_intrinsic_image_load:
+   case nir_intrinsic_bindless_image_load:
+   case nir_intrinsic_image_store:
+   case nir_intrinsic_bindless_image_store:
+      if (nir_intrinsic_image_dim(intrin) != GLSL_SAMPLER_DIM_MS)
+         return false;
+      return lower_image_sample_index_in_coord(b, intrin);
+
+   default:
+      return false;
+   }
+}
+
+bool
+brw_nir_lower_sample_index_in_coord(nir_shader *shader)
+{
+   return nir_shader_instructions_pass(shader,
+                                       lower_image_sample_index_in_coord_instr,
+                                       nir_metadata_none, NULL);
+}
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build
index 0d6e9257772..e89ba8093d3 100644
--- a/src/intel/compiler/meson.build
+++ b/src/intel/compiler/meson.build
@@ -75,6 +75,7 @@ libintel_compiler_brw_files = files(
   'brw_nir_lower_intersection_shader.c',
   'brw_nir_lower_ray_queries.c',
   'brw_nir_lower_rt_intrinsics.c',
+  'brw_nir_lower_sample_index_in_coord.c',
   'brw_nir_lower_shader_calls.c',
   'brw_nir_lower_storage_image.c',
   'brw_nir_lower_texel_address.c',