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nir: add address calc related opt rules

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Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
This commit is contained in:
Rob Clark 2019-09-26 10:34:51 -07:00
parent 6320e37d4b
commit 1bdde31392
1 changed files with 16 additions and 0 deletions
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16
src/compiler/nir/nir_opt_algebraic.py
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@ -1117,6 +1117,22 @@ optimizations.extend([
# for now, unconditionally convert amul to imul, this will
# change in the following patch
(('amul', a, b), ('imul', a, b)),
(('imad24_ir3', a, b, 0), ('imul24', a, b)),
(('imad24_ir3', a, 0, c), (c)),
(('imad24_ir3', a, 1, c), ('iadd', a, c)),
# if first two srcs are const, crack apart the imad so constant folding
# can clean up the imul:
# TODO ffma should probably get a similar rule:
(('imad24_ir3', '#a', '#b', c), ('iadd', ('imul', a, b), c)),
# These will turn 24b address/offset calc back into 32b shifts, but
# it should be safe to get back some of the bits of precision that we
# already decided were no necessary:
(('imul24', a, '#b@32(is_pos_power_of_two)'), ('ishl', a, ('find_lsb', b)), '!options->lower_bitops'),
(('imul24', a, '#b@32(is_neg_power_of_two)'), ('ineg', ('ishl', a, ('find_lsb', ('iabs', b)))), '!options->lower_bitops'),
(('imul24', a, 0), (0)),
])
# bit_size dependent lowerings