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synced 2026-05-05 00:58:05 +02:00
Don't emit OPCODE_CONT0/1, BRK0/1 instructions, clean-ups elsewhere.
This commit is contained in:
Brian
parent
f841b04601
commit
1bbd69251b
1 changed files with 66 additions and 49 deletions
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@ -171,7 +171,7 @@ free_temp_storage(slang_var_table *vt, slang_ir_node *n)
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_slang_free_temp(vt, n->Store);
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n->Store->Index = -1;
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n->Store->Size = -1;
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_mesa_free(n->Store);
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/*_mesa_free(n->Store);*/ /* XXX leak */
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n->Store = NULL;
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}
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}
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@ -1078,17 +1078,20 @@ static struct prog_instruction *
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emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
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{
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struct gl_program *prog = emitInfo->prog;
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struct prog_instruction *ifInst, *inst;
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GLuint ifInstLoc, elseInstLoc = 0;
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GLuint condWritemask = 0;
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inst = emit(emitInfo, n->Children[0]); /* the condition */
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if (emitInfo->EmitCondCodes) {
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if (!inst) {
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/* error recovery */
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return NULL;
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/* emit condition expression code */
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{
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struct prog_instruction *inst;
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inst = emit(emitInfo, n->Children[0]);
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if (emitInfo->EmitCondCodes) {
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if (!inst) {
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/* error recovery */
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return NULL;
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}
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condWritemask = inst->DstReg.WriteMask;
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}
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condWritemask = inst->DstReg.WriteMask;
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}
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#if 0
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@ -1097,7 +1100,7 @@ emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
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ifInstLoc = prog->NumInstructions;
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if (emitInfo->EmitHighLevelInstructions) {
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ifInst = new_instruction(emitInfo, OPCODE_IF);
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struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_IF);
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if (emitInfo->EmitCondCodes) {
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ifInst->DstReg.CondMask = COND_NE; /* if cond is non-zero */
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/* only test the cond code (1 of 4) that was updated by the
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@ -1112,7 +1115,7 @@ emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
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}
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else {
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/* conditional jump to else, or endif */
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ifInst = new_instruction(emitInfo, OPCODE_BRA);
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struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_BRA);
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ifInst->DstReg.CondMask = COND_EQ; /* BRA if cond is zero */
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ifInst->Comment = _mesa_strdup("if zero");
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ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
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@ -1134,15 +1137,12 @@ emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
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inst->Comment = _mesa_strdup("else");
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inst->DstReg.CondMask = COND_TR; /* always branch */
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}
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ifInst = prog->Instructions + ifInstLoc;
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ifInst->BranchTarget = prog->NumInstructions;
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prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
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emit(emitInfo, n->Children[2]);
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}
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else {
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/* no else body */
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ifInst = prog->Instructions + ifInstLoc;
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ifInst->BranchTarget = prog->NumInstructions /*+ 1*/;
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prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
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}
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if (emitInfo->EmitHighLevelInstructions) {
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@ -1150,9 +1150,7 @@ emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
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}
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if (n->Children[2]) {
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struct prog_instruction *elseInst;
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elseInst = prog->Instructions + elseInstLoc;
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elseInst->BranchTarget = prog->NumInstructions;
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prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions;
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}
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return NULL;
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}
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@ -1162,7 +1160,7 @@ static struct prog_instruction *
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emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
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{
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struct gl_program *prog = emitInfo->prog;
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struct prog_instruction *beginInst, *endInst;
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struct prog_instruction *endInst;
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GLuint beginInstLoc, tailInstLoc, endInstLoc;
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slang_ir_node *ir;
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@ -1198,8 +1196,7 @@ emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
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if (emitInfo->EmitHighLevelInstructions) {
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/* BGNLOOP's BranchTarget points to the ENDLOOP inst */
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beginInst = prog->Instructions + beginInstLoc;
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beginInst->BranchTarget = prog->NumInstructions - 1;
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prog->Instructions[beginInstLoc].BranchTarget = prog->NumInstructions -1;
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}
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/* Done emitting loop code. Now walk over the loop's linked list of
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@ -1213,8 +1210,6 @@ emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
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ir->Opcode == IR_BREAK_IF_FALSE ||
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ir->Opcode == IR_BREAK_IF_TRUE) {
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assert(inst->Opcode == OPCODE_BRK ||
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inst->Opcode == OPCODE_BRK0 ||
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inst->Opcode == OPCODE_BRK1 ||
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inst->Opcode == OPCODE_BRA);
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/* go to instruction after end of loop */
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inst->BranchTarget = endInstLoc + 1;
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@ -1224,8 +1219,6 @@ emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
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ir->Opcode == IR_CONT_IF_FALSE ||
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ir->Opcode == IR_CONT_IF_TRUE);
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assert(inst->Opcode == OPCODE_CONT ||
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inst->Opcode == OPCODE_CONT0 ||
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inst->Opcode == OPCODE_CONT1 ||
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inst->Opcode == OPCODE_BRA);
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/* go to instruction at tail of loop */
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inst->BranchTarget = endInstLoc;
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@ -1280,7 +1273,6 @@ static struct prog_instruction *
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emit_cont_break_if(slang_emit_info *emitInfo, slang_ir_node *n,
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GLboolean breakTrue)
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{
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gl_inst_opcode opcode;
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struct prog_instruction *inst;
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assert(n->Opcode == IR_CONT_IF_TRUE ||
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@ -1300,36 +1292,61 @@ emit_cont_break_if(slang_emit_info *emitInfo, slang_ir_node *n,
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/* opcode selection */
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if (emitInfo->EmitHighLevelInstructions) {
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if (emitInfo->EmitCondCodes) {
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if (n->Opcode == IR_CONT_IF_TRUE ||
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n->Opcode == IR_CONT_IF_FALSE)
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opcode = OPCODE_CONT;
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else
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opcode = OPCODE_BRK;
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gl_inst_opcode opcode
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= (n->Opcode == IR_CONT_IF_TRUE || n->Opcode == IR_CONT_IF_FALSE)
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? OPCODE_CONT : OPCODE_BRK;
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inst = new_instruction(emitInfo, opcode);
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inst->DstReg.CondMask = breakTrue ? COND_NE : COND_EQ;
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return inst;
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}
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else {
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if (n->Opcode == IR_CONT_IF_TRUE)
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opcode = OPCODE_CONT1;
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else if (n->Opcode == IR_CONT_IF_FALSE)
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opcode = OPCODE_CONT0;
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else if (n->Opcode == IR_BREAK_IF_TRUE)
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opcode = OPCODE_BRK1;
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else if (n->Opcode == IR_BREAK_IF_FALSE)
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opcode = OPCODE_BRK0;
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/* IF reg
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* BRK/CONT;
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* ENDIF
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*/
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GLint ifInstLoc;
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if (n->Opcode == IR_CONT_IF_TRUE ||
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n->Opcode == IR_BREAK_IF_TRUE) {
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ifInstLoc = emitInfo->prog->NumInstructions;
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inst = new_instruction(emitInfo, OPCODE_IF);
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storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
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}
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else {
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/* invert the expression */
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if (!alloc_temp_storage(emitInfo, n, 1))
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return NULL;
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inst = new_instruction(emitInfo, OPCODE_SEQ);
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storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
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constant_to_src_reg(&inst->SrcReg[1], 0.0, emitInfo);
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storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
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inst->Comment = _mesa_strdup("Invert true/false");
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ifInstLoc = emitInfo->prog->NumInstructions;
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inst = new_instruction(emitInfo, OPCODE_IF);
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storage_to_src_reg(&inst->SrcReg[0], n->Store);
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free_temp_storage(emitInfo->vt, n);
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}
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n->InstLocation = emitInfo->prog->NumInstructions;
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if (n->Opcode == IR_BREAK_IF_TRUE ||
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n->Opcode == IR_BREAK_IF_FALSE) {
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inst = new_instruction(emitInfo, OPCODE_BRK);
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}
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else {
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inst = new_instruction(emitInfo, OPCODE_CONT);
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}
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inst = new_instruction(emitInfo, OPCODE_ENDIF);
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emitInfo->prog->Instructions[ifInstLoc].BranchTarget
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= emitInfo->prog->NumInstructions;
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return inst;
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}
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}
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else {
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opcode = OPCODE_BRA;
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}
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inst = new_instruction(emitInfo, opcode);
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if (emitInfo->EmitCondCodes) {
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assert(emitInfo->EmitCondCodes);
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inst = new_instruction(emitInfo, OPCODE_BRA);
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inst->DstReg.CondMask = breakTrue ? COND_NE : COND_EQ;
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return inst;
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}
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else {
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/* BRK0, BRK1, CONT0, CONT1 uses SrcReg[0] as the condition */
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storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
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}
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return inst;
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}
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