From 1b869d2db5782fa27d9fa3ee3ce77699aa2d90af Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Mon, 11 Sep 2023 14:06:26 -0500 Subject: [PATCH] nak: Rename OpBFind to OpFlo Part-of: --- src/nouveau/compiler/nak_encode_sm75.rs | 4 ++-- src/nouveau/compiler/nak_from_nir.rs | 4 ++-- src/nouveau/compiler/nak_ir.rs | 10 +++++----- src/nouveau/compiler/nak_legalize.rs | 2 +- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/nouveau/compiler/nak_encode_sm75.rs b/src/nouveau/compiler/nak_encode_sm75.rs index a5276c87018..bfd5519eef7 100644 --- a/src/nouveau/compiler/nak_encode_sm75.rs +++ b/src/nouveau/compiler/nak_encode_sm75.rs @@ -550,7 +550,7 @@ impl SM75Instr { ); } - fn encode_bfind(&mut self, op: &OpBFind) { + fn encode_flo(&mut self, op: &OpFlo) { self.encode_alu( 0x100, Some(op.dst), @@ -1564,7 +1564,7 @@ impl SM75Instr { Op::FSetP(op) => si.encode_fsetp(&op), Op::MuFu(op) => si.encode_mufu(&op), Op::Brev(op) => si.encode_brev(&op), - Op::BFind(op) => si.encode_bfind(&op), + Op::Flo(op) => si.encode_flo(&op), Op::IAbs(op) => si.encode_iabs(&op), Op::IAdd3(op) => si.encode_iadd3(&op), Op::IAdd3X(op) => si.encode_iadd3x(&op), diff --git a/src/nouveau/compiler/nak_from_nir.rs b/src/nouveau/compiler/nak_from_nir.rs index a6c8f0f11cb..4edeae15774 100644 --- a/src/nouveau/compiler/nak_from_nir.rs +++ b/src/nouveau/compiler/nak_from_nir.rs @@ -238,7 +238,7 @@ impl<'a> ShaderFromNir<'a> { src: srcs[0], }); let dst = b.alloc_ssa(RegFile::GPR, 1); - b.push_op(OpBFind { + b.push_op(OpFlo { dst: dst.into(), src: tmp.into(), signed: alu.op == nir_op_ifind_msb, @@ -478,7 +478,7 @@ impl<'a> ShaderFromNir<'a> { } nir_op_ifind_msb | nir_op_ufind_msb => { let dst = b.alloc_ssa(RegFile::GPR, 1); - b.push_op(OpBFind { + b.push_op(OpFlo { dst: dst.into(), src: srcs[0], signed: alu.op == nir_op_ifind_msb, diff --git a/src/nouveau/compiler/nak_ir.rs b/src/nouveau/compiler/nak_ir.rs index 28fafdd3031..5333c9e496f 100644 --- a/src/nouveau/compiler/nak_ir.rs +++ b/src/nouveau/compiler/nak_ir.rs @@ -2078,7 +2078,7 @@ impl fmt::Display for OpBrev { #[repr(C)] #[derive(SrcsAsSlice, DstsAsSlice)] -pub struct OpBFind { +pub struct OpFlo { pub dst: Dst, #[src_type(ALU)] @@ -2088,9 +2088,9 @@ pub struct OpBFind { pub return_shift_amount: bool, } -impl fmt::Display for OpBFind { +impl fmt::Display for OpFlo { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - write!(f, "BFIND")?; + write!(f, "FLO")?; if self.return_shift_amount { write!(f, ".SAMT")?; } @@ -3618,7 +3618,7 @@ pub enum Op { FSetP(OpFSetP), DAdd(OpDAdd), Brev(OpBrev), - BFind(OpBFind), + Flo(OpFlo), IAbs(OpIAbs), INeg(OpINeg), IAdd3(OpIAdd3), @@ -4040,7 +4040,7 @@ impl Instr { | Op::FSOut(_) => { panic!("Not a hardware opcode") } - Op::PopC(_) | Op::Brev(_) | Op::BFind(_) | Op::Prmt(_) => Some(15), + Op::PopC(_) | Op::Brev(_) | Op::Flo(_) | Op::Prmt(_) => Some(15), } } } diff --git a/src/nouveau/compiler/nak_legalize.rs b/src/nouveau/compiler/nak_legalize.rs index 0b39fd6f2cd..65a4ffb2049 100644 --- a/src/nouveau/compiler/nak_legalize.rs +++ b/src/nouveau/compiler/nak_legalize.rs @@ -103,7 +103,7 @@ fn legalize_instr(b: &mut impl SSABuilder, instr: &mut Instr) { swap_srcs_if_not_reg(src0, src1); copy_src_if_not_reg(b, src0, RegFile::GPR); } - Op::Brev(_) | Op::BFind(_) | Op::IAbs(_) | Op::INeg(_) => (), + Op::Brev(_) | Op::Flo(_) | Op::IAbs(_) | Op::INeg(_) => (), Op::IAdd3(op) => { let [ref mut src0, ref mut src1, ref mut src2] = op.srcs; swap_srcs_if_not_reg(src0, src1);