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intel/brw: Use VEC for NIR vec*() sources

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This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
This commit is contained in:
Kenneth Graunke 2024-01-31 22:07:15 -08:00
parent d4563747d9
commit 1b54b4fad5
1 changed files with 14 additions and 9 deletions
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23
src/intel/compiler/brw_fs_nir.cpp
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@ -1051,16 +1051,21 @@ fs_nir_emit_alu(nir_to_brw_state &ntb, nir_alu_instr *instr,
nir_component_mask_t write_mask = get_nir_write_mask(instr->def);
unsigned last_bit = util_last_bit(write_mask);
for (unsigned i = 0; i < last_bit; i++) {
if (!(write_mask & (1 << i)))
continue;
fs_reg comps[last_bit];
if (instr->op == nir_op_mov) {
bld.MOV(offset(temp, bld, i),
offset(op[0], bld, instr->src[0].swizzle[i]));
} else {
bld.MOV(offset(temp, bld, i),
offset(op[i], bld, instr->src[i].swizzle[0]));
for (unsigned i = 0; i < last_bit; i++) {
if (instr->op == nir_op_mov)
comps[i] = offset(op[0], bld, instr->src[0].swizzle[i]);
else
comps[i] = offset(op[i], bld, instr->src[i].swizzle[0]);
}
if (write_mask == (1u << last_bit) - 1) {
bld.VEC(temp, comps, last_bit);
} else {
for (unsigned i = 0; i < last_bit; i++) {
if (write_mask & (1 << i))
bld.MOV(offset(temp, bld, i), comps[i]);
}
}