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aco: ensure readfirstlane subdword operands are always dword aligned

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Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6024>
This commit is contained in:
Daniel Schürmann 2020-07-23 09:58:11 +02:00 • committed by Marge Bot
parent 4c89bfc4ec
commit 1b3be07b5f
2 changed files with 5 additions and 0 deletions
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3
src/amd/compiler/aco_register_allocation.cpp
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@ -318,6 +318,9 @@ void print_regs(ra_ctx& ctx, bool vgprs, RegisterFile& reg_file)
unsigned get_subdword_operand_stride(chip_class chip, const aco_ptr<Instruction>& instr, unsigned idx, RegClass rc)
{
/* v_readfirstlane_b32 cannot use SDWA */
if (instr->opcode == aco_opcode::p_as_uniform)
return 4;
if (instr->format == Format::PSEUDO && chip >= GFX8)
return rc.bytes() % 2 == 0 ? 2 : 1;

2
src/amd/compiler/aco_validate.cpp
View file

@ -483,6 +483,8 @@ bool validate_subdword_operand(chip_class chip, const aco_ptr<Instruction>& inst
Operand op = instr->operands[index];
unsigned byte = op.physReg().byte();
if (instr->opcode == aco_opcode::p_as_uniform)
return byte == 0;
if (instr->format == Format::PSEUDO && chip >= GFX8)
return true;
if (instr->isSDWA() && (static_cast<SDWA_instruction *>(instr.get())->sel[index] & sdwa_asuint) == (sdwa_isra | op.bytes()))