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panfrost: Make pan_indirect_dispatch panfrost_device agnostic
This is part of our effort to make libpanfrost panfrost_{device,bo}
agnostic.
Since we are now passed a pool for descriptor allocations, there's no
point doing a single allocation for both the RSD and TSD, and we can
replace the get_{tls,rsd}() helpers by two fields at the
pan_indirect_dispatch_meta level, thus simplifying the logic a bit.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Constantine Shablya <constantine.shablya@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26698>
This commit is contained in:
parent
2bdcef6506
commit
1b1f1a6d76
5 changed files with 69 additions and 55 deletions
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@ -3634,9 +3634,6 @@ screen_destroy(struct pipe_screen *pscreen)
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{
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struct panfrost_device *dev = pan_device(pscreen);
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GENX(pan_blitter_cache_cleanup)(&dev->blitter);
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#if PAN_GPU_INDIRECTS
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GENX(pan_indirect_dispatch_cleanup)(dev);
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#endif
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}
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static void
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@ -3768,4 +3765,10 @@ GENX(panfrost_cmdstream_screen_init)(struct panfrost_screen *screen)
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GENX(pan_blitter_cache_init)
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(&dev->blitter, panfrost_device_gpu_id(dev), &dev->blend_shaders,
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&screen->blitter.bin_pool.base, &screen->blitter.desc_pool.base);
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#if PAN_GPU_INDIRECTS
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pan_indirect_dispatch_meta_init(
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&dev->indirect_dispatch, panfrost_device_gpu_id(dev),
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&screen->blitter.bin_pool.base, &screen->blitter.desc_pool.base);
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#endif
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}
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@ -335,6 +335,7 @@ GENX(jm_launch_grid)(struct panfrost_batch *batch,
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unsigned indirect_dep = 0;
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#if PAN_GPU_INDIRECTS
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if (info->indirect) {
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struct panfrost_device *dev = pan_device(batch->ctx->base.screen);
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struct pan_indirect_dispatch_info indirect = {
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.job = t.gpu,
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.indirect_dim = pan_resource(info->indirect)->image.data.bo->ptr.gpu +
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@ -348,7 +349,8 @@ GENX(jm_launch_grid)(struct panfrost_batch *batch,
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};
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indirect_dep = GENX(pan_indirect_dispatch_emit)(
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&batch->pool.base, &batch->jm.jobs.vtc_jc, &indirect);
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&dev->indirect_dispatch, &batch->pool.base, &batch->jm.jobs.vtc_jc,
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&indirect);
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}
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#endif
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@ -40,6 +40,7 @@
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#include "panfrost/util/pan_ir.h"
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#include "pan_blend.h"
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#include "pan_blitter.h"
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#include "pan_indirect_dispatch.h"
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#include "pan_pool.h"
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#include "pan_util.h"
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@ -64,12 +65,6 @@ extern "C" {
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/* Fencepost problem, hence the off-by-one */
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#define NR_BO_CACHE_BUCKETS (MAX_BO_CACHE_BUCKET - MIN_BO_CACHE_BUCKET + 1)
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struct pan_indirect_dispatch {
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struct panfrost_ubo_push push;
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struct panfrost_bo *bin;
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struct panfrost_bo *descs;
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};
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/** Implementation-defined tiler features */
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struct panfrost_tiler_features {
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/** Number of bytes per tiler bin */
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@ -181,7 +176,7 @@ struct panfrost_device {
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struct pan_blitter_cache blitter;
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struct pan_blend_shader_cache blend_shaders;
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struct pan_indirect_dispatch indirect_dispatch;
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struct pan_indirect_dispatch_meta indirect_dispatch;
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/* Tiler heap shared across all tiler jobs, allocated against the
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* device since there's only a single tiler. Since this is invisible to
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@ -27,7 +27,6 @@
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#include "compiler/nir/nir_builder.h"
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#include "util/macros.h"
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#include "util/u_memory.h"
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#include "pan_bo.h"
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#include "pan_encoder.h"
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#include "pan_jc.h"
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#include "pan_pool.h"
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@ -40,20 +39,8 @@
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nir_imm_int(b, 0), \
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.base = offsetof(struct pan_indirect_dispatch_info, name))
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static mali_ptr
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get_rsd(const struct panfrost_device *dev)
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{
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return dev->indirect_dispatch.descs->ptr.gpu;
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}
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static mali_ptr
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get_tls(const struct panfrost_device *dev)
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{
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return dev->indirect_dispatch.descs->ptr.gpu + pan_size(RENDERER_STATE);
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}
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static void
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pan_indirect_dispatch_init(struct panfrost_device *dev)
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pan_indirect_dispatch_init(struct pan_indirect_dispatch_meta *meta)
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{
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nir_builder b = nir_builder_init_simple_shader(
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MESA_SHADER_COMPUTE, GENX(pan_shader_get_compiler_options)(), "%s",
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@ -121,7 +108,7 @@ pan_indirect_dispatch_init(struct panfrost_device *dev)
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nir_pop_if(&b, NULL);
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struct panfrost_compile_inputs inputs = {
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.gpu_id = panfrost_device_gpu_id(dev),
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.gpu_id = meta->gpu_id,
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.no_ubo_to_push = true,
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};
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struct pan_shader_info shader_info;
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@ -139,40 +126,40 @@ pan_indirect_dispatch_init(struct panfrost_device *dev)
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shader_info.push.count =
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DIV_ROUND_UP(sizeof(struct pan_indirect_dispatch_info), 4);
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dev->indirect_dispatch.bin = panfrost_bo_create(
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dev, binary.size, PAN_BO_EXECUTE, "Indirect dispatch shader");
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struct panfrost_ptr bin =
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pan_pool_alloc_aligned(meta->bin_pool, binary.size, 64);
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memcpy(dev->indirect_dispatch.bin->ptr.cpu, binary.data, binary.size);
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memcpy(bin.cpu, binary.data, binary.size);
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util_dynarray_fini(&binary);
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dev->indirect_dispatch.descs = panfrost_bo_create(
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dev, pan_size(RENDERER_STATE) + pan_size(LOCAL_STORAGE), 0,
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"Indirect dispatch descriptors");
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struct panfrost_ptr rsd =
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pan_pool_alloc_desc(meta->desc_pool, RENDERER_STATE);
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struct panfrost_ptr tsd =
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pan_pool_alloc_desc(meta->desc_pool, LOCAL_STORAGE);
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mali_ptr address = dev->indirect_dispatch.bin->ptr.gpu;
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void *rsd = dev->indirect_dispatch.descs->ptr.cpu;
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pan_pack(rsd, RENDERER_STATE, cfg) {
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pan_shader_prepare_rsd(&shader_info, address, &cfg);
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pan_pack(rsd.cpu, RENDERER_STATE, cfg) {
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pan_shader_prepare_rsd(&shader_info, bin.gpu, &cfg);
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}
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void *tsd = dev->indirect_dispatch.descs->ptr.cpu + pan_size(RENDERER_STATE);
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pan_pack(tsd, LOCAL_STORAGE, ls) {
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pan_pack(tsd.cpu, LOCAL_STORAGE, ls) {
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ls.wls_instances = MALI_LOCAL_STORAGE_NO_WORKGROUP_MEM;
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};
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meta->rsd = rsd.gpu;
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meta->tsd = tsd.gpu;
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}
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unsigned
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GENX(pan_indirect_dispatch_emit)(struct pan_pool *pool, struct pan_jc *jc,
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GENX(pan_indirect_dispatch_emit)(struct pan_indirect_dispatch_meta *meta,
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struct pan_pool *pool, struct pan_jc *jc,
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const struct pan_indirect_dispatch_info *inputs)
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{
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struct panfrost_device *dev = pool->dev;
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struct panfrost_ptr job = pan_pool_alloc_desc(pool, COMPUTE_JOB);
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void *invocation = pan_section_ptr(job.cpu, COMPUTE_JOB, INVOCATION);
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/* If we haven't compiled the indirect dispatch shader yet, do it now */
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if (!dev->indirect_dispatch.bin)
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pan_indirect_dispatch_init(dev);
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if (!meta->rsd)
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pan_indirect_dispatch_init(meta);
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panfrost_pack_work_groups_compute(invocation, 1, 1, 1, 1, 1, 1, false,
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false);
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@ -182,8 +169,8 @@ GENX(pan_indirect_dispatch_emit)(struct pan_pool *pool, struct pan_jc *jc,
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}
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pan_section_pack(job.cpu, COMPUTE_JOB, DRAW, cfg) {
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cfg.state = get_rsd(dev);
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cfg.thread_storage = get_tls(pool->dev);
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cfg.state = meta->rsd;
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cfg.thread_storage = meta->tsd;
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cfg.push_uniforms =
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pan_pool_upload_aligned(pool, inputs, sizeof(*inputs), 16);
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}
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@ -191,10 +178,3 @@ GENX(pan_indirect_dispatch_emit)(struct pan_pool *pool, struct pan_jc *jc,
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return pan_jc_add_job(pool, jc, MALI_JOB_TYPE_COMPUTE, false, true, 0, 0,
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&job, false);
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}
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void
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GENX(pan_indirect_dispatch_cleanup)(struct panfrost_device *dev)
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{
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panfrost_bo_unreference(dev->indirect_dispatch.bin);
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panfrost_bo_unreference(dev->indirect_dispatch.descs);
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}
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@ -27,20 +27,54 @@
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#include "genxml/gen_macros.h"
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#include "pan_jc.h"
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struct pan_device;
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#include "panfrost/util/pan_ir.h"
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struct pan_jc;
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struct pan_pool;
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struct pan_indirect_dispatch_meta {
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struct panfrost_ubo_push push;
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unsigned gpu_id;
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/* Renderer state descriptor. */
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mali_ptr rsd;
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/* Thread storage descriptor. */
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mali_ptr tsd;
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/* Shader binary pool. */
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struct pan_pool *bin_pool;
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/* Shader desc pool for any descriptor that can be re-used across
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* indirect dispatch calls. Job descriptors are allocated from the pool
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* passed to pan_indirect_dispatch_emit().
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*/
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struct pan_pool *desc_pool;
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};
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struct pan_indirect_dispatch_info {
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mali_ptr job;
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mali_ptr indirect_dim;
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mali_ptr num_wg_sysval[3];
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} PACKED;
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static inline void
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pan_indirect_dispatch_meta_init(struct pan_indirect_dispatch_meta *meta,
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unsigned gpu_id, struct pan_pool *bin_pool,
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struct pan_pool *desc_pool)
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{
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memset(meta, 0, sizeof(*meta));
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meta->gpu_id = gpu_id;
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meta->bin_pool = bin_pool;
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meta->desc_pool = desc_pool;
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}
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#ifdef PAN_ARCH
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unsigned GENX(pan_indirect_dispatch_emit)(
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struct pan_indirect_dispatch_meta *meta,
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struct pan_pool *pool, struct pan_jc *jc,
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const struct pan_indirect_dispatch_info *dispatch_info);
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void GENX(pan_indirect_dispatch_cleanup)(struct panfrost_device *dev);
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#endif
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#endif
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