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i965: Pull calls to get_shader_time_index out of the visitor

Browse source 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
This commit is contained in:
Jason Ekstrand 2015-06-19 15:40:09 -07:00
parent c7893dc3c5
commit 1b0f6ffa15
16 changed files with 79 additions and 76 deletions
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8
src/mesa/drivers/dri/i965/brw_cs.cpp
View file

@ -88,10 +88,14 @@ brw_cs_emit(struct brw_context *brw,
cfg_t *cfg = NULL;
const char *fail_msg = NULL;
int st_index = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
st_index = brw_get_shader_time_index(brw, prog, &cp->Base, ST_CS);
/* Now the main event: Visit the shader IR and generate our CS IR for it.
*/
fs_visitor v8(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
&cp->Base, 8);
&cp->Base, 8, st_index);
if (!v8.run_cs()) {
fail_msg = v8.fail_msg;
} else if (local_workgroup_size <= 8 * brw->max_cs_threads) {
@ -100,7 +104,7 @@ brw_cs_emit(struct brw_context *brw,
}
fs_visitor v16(brw, mem_ctx, MESA_SHADER_COMPUTE, key, &prog_data->base, prog,
&cp->Base, 16);
&cp->Base, 16, st_index);
if (likely(!(INTEL_DEBUG & DEBUG_NO16)) &&
!fail_msg && !v8.simd16_unsupported &&
local_workgroup_size <= 16 * brw->max_cs_threads) {

55
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -578,31 +578,6 @@ fs_visitor::emit_shader_time_begin()
void
fs_visitor::emit_shader_time_end()
{
enum shader_time_shader_type type;
switch (stage) {
case MESA_SHADER_VERTEX:
type = ST_VS;
break;
case MESA_SHADER_GEOMETRY:
type = ST_GS;
break;
case MESA_SHADER_FRAGMENT:
if (dispatch_width == 8) {
type = ST_FS8;
} else {
assert(dispatch_width == 16);
type = ST_FS16;
}
break;
case MESA_SHADER_COMPUTE:
type = ST_CS;
break;
default:
unreachable("fs_visitor::emit_shader_time_end missing code");
}
int shader_time_index = brw_get_shader_time_index(brw, shader_prog, prog,
type);
/* Insert our code just before the final SEND with EOT. */
exec_node *end = this->instructions.get_tail();
assert(end && ((fs_inst *) end)->eot);
@ -631,16 +606,16 @@ fs_visitor::emit_shader_time_end()
* trying to determine the time taken for single instructions.
*/
ibld.ADD(diff, diff, fs_reg(-2u));
SHADER_TIME_ADD(ibld, shader_time_index, 0, diff);
SHADER_TIME_ADD(ibld, shader_time_index, 1, fs_reg(1u));
SHADER_TIME_ADD(ibld, 0, diff);
SHADER_TIME_ADD(ibld, 1, fs_reg(1u));
ibld.emit(BRW_OPCODE_ELSE);
SHADER_TIME_ADD(ibld, shader_time_index, 2, fs_reg(1u));
SHADER_TIME_ADD(ibld, 2, fs_reg(1u));
ibld.emit(BRW_OPCODE_ENDIF);
}
void
fs_visitor::SHADER_TIME_ADD(const fs_builder &bld,
int shader_time_index, int shader_time_subindex,
int shader_time_subindex,
fs_reg value)
{
int index = shader_time_index * 3 + shader_time_subindex;
@ -3835,7 +3810,7 @@ fs_visitor::run_vs()
assign_common_binding_table_offsets(0);
setup_vs_payload();
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
if (shader_time_index >= 0)
emit_shader_time_begin();
emit_nir_code();
@ -3845,7 +3820,7 @@ fs_visitor::run_vs()
emit_urb_writes();
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
if (shader_time_index >= 0)
emit_shader_time_end();
calculate_cfg();
@ -3883,7 +3858,7 @@ fs_visitor::run_fs()
} else if (brw->use_rep_send && dispatch_width == 16) {
emit_repclear_shader();
} else {
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
if (shader_time_index >= 0)
emit_shader_time_begin();
calculate_urb_setup();
@ -3918,7 +3893,7 @@ fs_visitor::run_fs()
emit_fb_writes();
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
if (shader_time_index >= 0)
emit_shader_time_end();
calculate_cfg();
@ -3962,7 +3937,7 @@ fs_visitor::run_cs()
setup_cs_payload();
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
if (shader_time_index >= 0)
emit_shader_time_begin();
emit_nir_code();
@ -3972,7 +3947,7 @@ fs_visitor::run_cs()
emit_cs_terminate();
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
if (shader_time_index >= 0)
emit_shader_time_end();
calculate_cfg();
@ -4022,10 +3997,16 @@ brw_wm_fs_emit(struct brw_context *brw,
if (unlikely(INTEL_DEBUG & DEBUG_WM))
brw_dump_ir("fragment", prog, &shader->base, &fp->Base);
int st_index8 = -1, st_index16 = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
st_index8 = brw_get_shader_time_index(brw, prog, &fp->Base, ST_FS8);
st_index16 = brw_get_shader_time_index(brw, prog, &fp->Base, ST_FS16);
}
/* Now the main event: Visit the shader IR and generate our FS IR for it.
*/
fs_visitor v(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
prog, &fp->Base, 8);
prog, &fp->Base, 8, st_index8);
if (!v.run_fs()) {
if (prog) {
prog->LinkStatus = false;
@ -4040,7 +4021,7 @@ brw_wm_fs_emit(struct brw_context *brw,
cfg_t *simd16_cfg = NULL;
fs_visitor v2(brw, mem_ctx, MESA_SHADER_FRAGMENT, key, &prog_data->base,
prog, &fp->Base, 16);
prog, &fp->Base, 16, st_index16);
if (likely(!(INTEL_DEBUG & DEBUG_NO16) || brw->use_rep_send)) {
if (!v.simd16_unsupported) {
/* Try a SIMD16 compile */

7
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -77,7 +77,8 @@ public:
struct brw_stage_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_program *prog,
unsigned dispatch_width);
unsigned dispatch_width,
int shader_time_index);
~fs_visitor();
@ -278,7 +279,7 @@ public:
void emit_shader_time_begin();
void emit_shader_time_end();
void SHADER_TIME_ADD(const brw::fs_builder &bld,
int shader_time_index, int shader_time_subindex,
int shader_time_subindex,
fs_reg value);
void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
@ -387,6 +388,8 @@ public:
const unsigned dispatch_width; /**< 8 or 16 */
int shader_time_index;
unsigned promoted_constants;
brw::fs_builder bld;
};

7
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
View file

@ -1983,10 +1983,13 @@ fs_visitor::fs_visitor(struct brw_context *brw,
struct brw_stage_prog_data *prog_data,
struct gl_shader_program *shader_prog,
struct gl_program *prog,
unsigned dispatch_width)
unsigned dispatch_width,
int shader_time_index)
: backend_shader(brw, mem_ctx, shader_prog, prog, prog_data, stage),
key(key), prog_data(prog_data),
dispatch_width(dispatch_width), promoted_constants(0),
dispatch_width(dispatch_width),
shader_time_index(shader_time_index),
promoted_constants(0),
bld(fs_builder(this, dispatch_width).at_end())
{
switch (stage) {

25
src/mesa/drivers/dri/i965/brw_vec4.cpp
View file

@ -1676,20 +1676,15 @@ vec4_visitor::emit_shader_time_end()
*/
emit(ADD(diff, src_reg(diff), src_reg(-2u)));
int shader_time_index =
brw_get_shader_time_index(brw, shader_prog, prog, st_type);
emit_shader_time_write(shader_time_index, 0, src_reg(diff));
emit_shader_time_write(shader_time_index, 1, src_reg(1u));
emit_shader_time_write(0, src_reg(diff));
emit_shader_time_write(1, src_reg(1u));
emit(BRW_OPCODE_ELSE);
emit_shader_time_write(shader_time_index, 2, src_reg(1u));
emit_shader_time_write(2, src_reg(1u));
emit(BRW_OPCODE_ENDIF);
}
void
vec4_visitor::emit_shader_time_write(int shader_time_index,
int shader_time_subindex,
src_reg value)
vec4_visitor::emit_shader_time_write(int shader_time_subindex, src_reg value)
{
dst_reg dst =
dst_reg(this, glsl_type::get_array_instance(glsl_type::vec4_type, 2));
@ -1715,7 +1710,7 @@ vec4_visitor::run()
{
sanity_param_count = prog->Parameters->NumParameters;
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
if (shader_time_index >= 0)
emit_shader_time_begin();
assign_binding_table_offsets();
@ -1881,6 +1876,11 @@ brw_vs_emit(struct brw_context *brw,
if (prog)
shader = (brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX];
int st_index = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
st_index = brw_get_shader_time_index(brw, prog, &c->vp->program.Base,
ST_VS);
if (unlikely(INTEL_DEBUG & DEBUG_VS))
brw_dump_ir("vertex", prog, &shader->base, &c->vp->program.Base);
@ -1899,7 +1899,8 @@ brw_vs_emit(struct brw_context *brw,
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
fs_visitor v(brw, mem_ctx, MESA_SHADER_VERTEX, &c->key,
&prog_data->base.base, prog, &c->vp->program.Base, 8);
&prog_data->base.base, prog, &c->vp->program.Base,
8, st_index);
if (!v.run_vs()) {
if (prog) {
prog->LinkStatus = false;
@ -1937,7 +1938,7 @@ brw_vs_emit(struct brw_context *brw,
if (!assembly) {
prog_data->base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
vec4_vs_visitor v(brw, c, prog_data, prog, mem_ctx);
vec4_vs_visitor v(brw, c, prog_data, prog, mem_ctx, st_index);
if (!v.run()) {
if (prog) {
prog->LinkStatus = false;

7
src/mesa/drivers/dri/i965/brw_vec4.h
View file

@ -85,7 +85,7 @@ public:
gl_shader_stage stage,
void *mem_ctx,
bool no_spills,
shader_time_shader_type st_type);
int shader_time_index);
~vec4_visitor();
dst_reg dst_null_f()
@ -343,8 +343,7 @@ public:
void emit_shader_time_begin();
void emit_shader_time_end();
void emit_shader_time_write(int shader_time_index, int shader_time_subindex,
src_reg value);
void emit_shader_time_write(int shader_time_subindex, src_reg value);
void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index,
dst_reg dst, src_reg offset, src_reg src0,
@ -411,7 +410,7 @@ private:
*/
const bool no_spills;
const shader_time_shader_type st_type;
int shader_time_index;
};

18
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
View file

@ -38,10 +38,11 @@ vec4_gs_visitor::vec4_gs_visitor(struct brw_context *brw,
struct brw_gs_compile *c,
struct gl_shader_program *prog,
void *mem_ctx,
bool no_spills)
bool no_spills,
int shader_time_index)
: vec4_visitor(brw, &c->base, &c->gp->program.Base, &c->key.base,
&c->prog_data.base, prog, MESA_SHADER_GEOMETRY, mem_ctx,
no_spills, ST_GS),
no_spills, shader_time_index),
c(c)
{
}
@ -648,6 +649,10 @@ brw_gs_emit(struct brw_context *brw,
brw_dump_ir("geometry", prog, &shader->base, NULL);
}
int st_index = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
st_index = brw_get_shader_time_index(brw, prog, NULL, ST_GS);
if (brw->gen >= 7) {
/* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do
* so without spilling. If the GS invocations count > 1, then we can't use
@ -657,7 +662,8 @@ brw_gs_emit(struct brw_context *brw,
likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) {
c->prog_data.base.dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT;
vec4_gs_visitor v(brw, c, prog, mem_ctx, true /* no_spills */);
vec4_gs_visitor v(brw, c, prog, mem_ctx, true /* no_spills */,
st_index);
if (v.run()) {
return generate_assembly(brw, prog, &c->gp->program.Base,
&c->prog_data.base, mem_ctx, v.cfg,
@ -698,9 +704,11 @@ brw_gs_emit(struct brw_context *brw,
const unsigned *ret = NULL;
if (brw->gen >= 7)
gs = new vec4_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */);
gs = new vec4_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */,
st_index);
else
gs = new gen6_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */);
gs = new gen6_gs_visitor(brw, c, prog, mem_ctx, false /* no_spills */,
st_index);
if (!gs->run()) {
prog->LinkStatus = false;

3
src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h
View file

@ -72,7 +72,8 @@ public:
struct brw_gs_compile *c,
struct gl_shader_program *prog,
void *mem_ctx,
bool no_spills);
bool no_spills,
int shader_time_index);
protected:
virtual dst_reg *make_reg_for_system_value(ir_variable *ir);

4
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
View file

@ -3688,7 +3688,7 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
gl_shader_stage stage,
void *mem_ctx,
bool no_spills,
shader_time_shader_type st_type)
int shader_time_index)
: backend_shader(brw, mem_ctx, shader_prog, prog, &prog_data->base, stage),
c(c),
key(key),
@ -3698,7 +3698,7 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
first_non_payload_grf(0),
need_all_constants_in_pull_buffer(false),
no_spills(no_spills),
st_type(st_type)
shader_time_index(shader_time_index)
{
this->failed = false;

5
src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
View file

@ -216,12 +216,13 @@ vec4_vs_visitor::vec4_vs_visitor(struct brw_context *brw,
struct brw_vs_compile *vs_compile,
struct brw_vs_prog_data *vs_prog_data,
struct gl_shader_program *prog,
void *mem_ctx)
void *mem_ctx,
int shader_time_index)
: vec4_visitor(brw, &vs_compile->base, &vs_compile->vp->program.Base,
&vs_compile->key.base, &vs_prog_data->base, prog,
MESA_SHADER_VERTEX,
mem_ctx, false /* no_spills */,
ST_VS),
shader_time_index),
vs_compile(vs_compile),
vs_prog_data(vs_prog_data)
{

3
src/mesa/drivers/dri/i965/brw_vs.h
View file

@ -94,7 +94,8 @@ public:
struct brw_vs_compile *vs_compile,
struct brw_vs_prog_data *vs_prog_data,
struct gl_shader_program *prog,
void *mem_ctx);
void *mem_ctx,
int shader_time_index);
protected:
virtual dst_reg *make_reg_for_system_value(ir_variable *ir);

5
src/mesa/drivers/dri/i965/gen6_gs_visitor.h
View file

@ -39,8 +39,9 @@ public:
struct brw_gs_compile *c,
struct gl_shader_program *prog,
void *mem_ctx,
bool no_spills) :
vec4_gs_visitor(brw, c, prog, mem_ctx, no_spills) {}
bool no_spills,
int shader_time_index) :
vec4_gs_visitor(brw, c, prog, mem_ctx, no_spills, shader_time_index) {}
protected:
virtual void assign_binding_table_offsets();

2
src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
View file

@ -48,7 +48,7 @@ public:
struct brw_wm_prog_data *prog_data,
struct gl_shader_program *shader_prog)
: fs_visitor(brw, NULL, MESA_SHADER_FRAGMENT, NULL, &prog_data->base,
shader_prog, (struct gl_program *) NULL, 8) {}
shader_prog, (struct gl_program *) NULL, 8, -1) {}
};

2
src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
View file

@ -48,7 +48,7 @@ public:
struct brw_wm_prog_data *prog_data,
struct gl_shader_program *shader_prog)
: fs_visitor(brw, NULL, MESA_SHADER_FRAGMENT, NULL, &prog_data->base,
shader_prog, (struct gl_program *) NULL, 8) {}
shader_prog, (struct gl_program *) NULL, 8, -1) {}
};

2
src/mesa/drivers/dri/i965/test_vec4_copy_propagation.cpp
View file

@ -48,7 +48,7 @@ public:
struct gl_shader_program *shader_prog)
: vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog,
MESA_SHADER_VERTEX, NULL,
false /* no_spills */, ST_NONE)
false /* no_spills */, -1)
{
}

2
src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp
View file

@ -51,7 +51,7 @@ public:
struct gl_shader_program *shader_prog)
: vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog,
MESA_SHADER_VERTEX, NULL,
false /* no_spills */, ST_NONE)
false /* no_spills */, -1)
{
}