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Defer buffer pool creation to the first context creation.

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This way we have a hw context so that we can take the hardware lock.
Also, at this point, AIGLX isn't locked with the X server context as it is
at screen creation.
This commit is contained in:
Thomas Hellstrom 2007-04-17 15:21:54 +02:00
parent 36949abec7
commit 1a9483c954
3 changed files with 55 additions and 43 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
src/mesa/drivers/dri/i915tex/intel_context.c
View file

@ -346,7 +346,15 @@ intelInitContext(struct intel_context *intel,
drmI830Sarea *saPriv = (drmI830Sarea *)
(((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
int fthrottle_mode;
GLboolean havePools;
DRM_LIGHT_LOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext);
havePools = intelCreatePools(intelScreen);
DRM_UNLOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext);
if (!havePools)
return GL_FALSE;
if (!_mesa_initialize_context(&intel->ctx,
mesaVis, shareCtx,
functions, (void *) intel))

87
src/mesa/drivers/dri/i915tex/intel_screen.c
View file

@ -386,6 +386,45 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
intelPrintSAREA(sarea);
}
GLboolean
intelCreatePools(intelScreenPrivate *intelScreen)
{
unsigned batchPoolSize = 1024*1024;
__DRIscreenPrivate * sPriv = intelScreen->driScrnPriv;
if (intelScreen->havePools)
return GL_TRUE;
batchPoolSize /= intelScreen->maxBatchSize;
intelScreen->regionPool = driDRMPoolInit(sPriv->fd);
if (!intelScreen->regionPool)
return GL_FALSE;
intelScreen->staticPool = driDRMStaticPoolInit(sPriv->fd);
if (!intelScreen->staticPool)
return GL_FALSE;
intelScreen->texPool = intelScreen->regionPool;
intelScreen->batchPool = driBatchPoolInit(sPriv->fd,
DRM_BO_FLAG_EXE |
DRM_BO_FLAG_MEM_TT |
DRM_BO_FLAG_MEM_LOCAL,
intelScreen->maxBatchSize,
batchPoolSize, 5);
if (!intelScreen->batchPool) {
fprintf(stderr, "Failed to initialize batch pool - possible incorrect agpgart installed\n");
return GL_FALSE;
}
intel_recreate_static_regions(intelScreen);
intelScreen->havePools = GL_TRUE;
return GL_TRUE;
}
static GLboolean
intelInitDriver(__DRIscreenPrivate * sPriv)
@ -393,7 +432,6 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
intelScreenPrivate *intelScreen;
I830DRIPtr gDRIPriv = (I830DRIPtr) sPriv->pDevPriv;
drmI830Sarea *sarea;
unsigned batchPoolSize = 1024*1024;
PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
(PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->
@ -426,7 +464,6 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
intelScreen->deviceID = gDRIPriv->deviceID;
if (intelScreen->deviceID == PCI_CHIP_I865_G)
intelScreen->maxBatchSize = 4096;
batchPoolSize /= intelScreen->maxBatchSize;
intelScreen->mem = gDRIPriv->mem;
intelScreen->cpp = gDRIPriv->cpp;
@ -517,31 +554,6 @@ intelInitDriver(__DRIscreenPrivate * sPriv)
(*glx_enable_extension) (psc, "GLX_SGI_make_current_read");
}
intelScreen->regionPool = driDRMPoolInit(sPriv->fd);
if (!intelScreen->regionPool)
return GL_FALSE;
intelScreen->staticPool = driDRMStaticPoolInit(sPriv->fd);
if (!intelScreen->staticPool)
return GL_FALSE;
intelScreen->texPool = intelScreen->regionPool;
intelScreen->batchPool = driBatchPoolInit(sPriv->fd,
DRM_BO_FLAG_EXE |
DRM_BO_FLAG_MEM_TT |
DRM_BO_FLAG_MEM_LOCAL,
intelScreen->maxBatchSize,
batchPoolSize, 5);
if (!intelScreen->batchPool) {
fprintf(stderr, "Failed to initialize batch pool - possible incorrect agpgart installed\n");
return GL_FALSE;
}
intel_recreate_static_regions(intelScreen);
return GL_TRUE;
}
@ -553,9 +565,11 @@ intelDestroyScreen(__DRIscreenPrivate * sPriv)
intelUnmapScreenRegions(intelScreen);
driPoolTakeDown(intelScreen->regionPool);
driPoolTakeDown(intelScreen->staticPool);
driPoolTakeDown(intelScreen->batchPool);
if (intelScreen->havePools) {
driPoolTakeDown(intelScreen->regionPool);
driPoolTakeDown(intelScreen->staticPool);
driPoolTakeDown(intelScreen->batchPool);
}
FREE(intelScreen);
sPriv->private = NULL;
}
@ -878,19 +892,9 @@ __driCreateNewScreen_20050727(__DRInativeDisplay * dpy, int scrn,
static const __DRIversion ddx_expected = { 1, 5, 0 };
static const __DRIversion dri_expected = { 4, 0, 0 };
static const __DRIversion drm_expected = { 1, 7, 0 };
int tmpContextID;
GLuint tmpContext;
dri_interface = interface;
if (!(*dri_interface->createContext)(dpy, modes->screen,
modes->fbconfigID,
&tmpContextID, &tmpContext)) {
fprintf(stderr, "Could not create temporary context.\n");
return NULL;
}
DRM_LIGHT_LOCK(fd, &((drm_sarea_t *)pSAREA)->lock, tmpContext);
if (!driCheckDriDdxDrmVersions2("i915",
dri_version, &dri_expected,
ddx_version, &ddx_expected,
@ -903,9 +907,6 @@ __driCreateNewScreen_20050727(__DRInativeDisplay * dpy, int scrn,
frame_buffer, pSAREA, fd,
internal_api_version, &intelAPI);
DRM_UNLOCK(fd, &((drm_sarea_t *)pSAREA)->lock, tmpContext);
(void) (*dri_interface->destroyContext)(dpy, modes->screen, tmpContextID);
if (psp != NULL) {
I830DRIPtr dri_priv = (I830DRIPtr) psp->pDevPriv;
*driver_modes = intelFillInModes(dri_priv->cpp * 8,

3
src/mesa/drivers/dri/i915tex/intel_screen.h
View file

@ -95,6 +95,7 @@ typedef struct
struct _DriBufferPool *regionPool;
struct _DriBufferPool *staticPool;
unsigned int maxBatchSize;
GLboolean havePools;
} intelScreenPrivate;
@ -130,5 +131,7 @@ extern struct intel_context *intelScreenContext(intelScreenPrivate *intelScreen)
extern void
intelUpdateScreenRotation(__DRIscreenPrivate * sPriv, drmI830Sarea * sarea);
extern GLboolean
intelCreatePools(intelScreenPrivate *intelScreen);
#endif