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iris: Consolodate URB emit

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Now that we don't have to carry a URB state emit function for BLORP we
can roll some stuff together and drop a genX helper.

Cc: "20.0" mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
(cherry picked from commit e928676b69)
This commit is contained in:
Jason Ekstrand 2020-01-17 13:38:52 -06:00 • committed by Dylan Baker
parent deeba167fd
commit 1a57247da8
4 changed files with 16 additions and 37 deletions
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2
.pick_status.json
View file

@ -166,7 +166,7 @@
"description": "iris: Consolodate URB emit",
"nominated": true,
"nomination_type": 0,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": null
},

3
src/gallium/drivers/iris/iris_context.h
View file

@ -670,9 +670,6 @@ struct iris_context {
/** Is a GS or TES outputting points or lines? */
bool output_topology_is_points_or_lines;
/* Track last VS URB entry size */
unsigned last_vs_entry_size;
/**
* Scratch buffers for various sizes and stages.
*

4
src/gallium/drivers/iris/iris_genx_protos.h
View file

@ -29,10 +29,6 @@
/* iris_state.c */
void genX(init_state)(struct iris_context *ice);
void genX(emit_urb_setup)(struct iris_context *ice,
struct iris_batch *batch,
const unsigned size[4],
bool tess_present, bool gs_present);
void genX(emit_hashing_mode)(struct iris_context *ice,
struct iris_batch *batch,
unsigned width, unsigned height,

44
src/gallium/drivers/iris/iris_state.c
View file

@ -5381,9 +5381,21 @@ iris_upload_dirty_render_state(struct iris_context *ice,
assert(size[i] != 0);
}
genX(emit_urb_setup)(ice, batch, size,
ice->shaders.prog[MESA_SHADER_TESS_EVAL] != NULL,
ice->shaders.prog[MESA_SHADER_GEOMETRY] != NULL);
unsigned entries[4], start[4];
gen_get_urb_config(&batch->screen->devinfo,
batch->screen->l3_config_3d,
ice->shaders.prog[MESA_SHADER_TESS_EVAL] != NULL,
ice->shaders.prog[MESA_SHADER_GEOMETRY] != NULL,
size, entries, start);
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
iris_emit_cmd(batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = start[i];
urb.VSURBEntryAllocationSize = size[i] - 1;
urb.VSNumberofURBEntries = entries[i];
}
}
}
if (dirty & IRIS_DIRTY_BLEND_STATE) {
@ -7218,32 +7230,6 @@ iris_emit_raw_pipe_control(struct iris_batch *batch,
}
}
void
genX(emit_urb_setup)(struct iris_context *ice,
struct iris_batch *batch,
const unsigned size[4],
bool tess_present, bool gs_present)
{
const struct gen_device_info *devinfo = &batch->screen->devinfo;
unsigned entries[4];
unsigned start[4];
ice->shaders.last_vs_entry_size = size[MESA_SHADER_VERTEX];
gen_get_urb_config(devinfo, batch->screen->l3_config_3d,
tess_present, gs_present,
size, entries, start);
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
iris_emit_cmd(batch, GENX(3DSTATE_URB_VS), urb) {
urb._3DCommandSubOpcode += i;
urb.VSURBStartingAddress = start[i];
urb.VSURBEntryAllocationSize = size[i] - 1;
urb.VSNumberofURBEntries = entries[i];
}
}
}
#if GEN_GEN == 9
/**
* Preemption on Gen9 has to be enabled or disabled in various cases.